How is it that an executable can work on both AMD and Intel systems? Aren't AMD's and Intel's instruction sets different? How does the executable work on both? How exactly do they compile the files...

Background It is well known that the exact product of two floating point numbers is not always a floating point number, but the error exact(a*b) - float(a*b) is. Some codes for exact multiplicatio...

I am studying Assembly programming in general, so I've decided to try and implement a "virtual microprocessor" in software, which has registers, flags and RAM to work with, implemented with variabl...

When disassembling an executable I encountered the cmove instruction. I've already searched on the Internet but I've only found that it's a conditional move, and if the source and destination are e...

I've been looking for a list of the opcodes used in ARM Cortex M3/M4/M4F, without luck. There are plenty of [online] references to the 32-bit format of ARM instructions. References to Thumb-2 instr...

I remember in an assembly class, we learned the m68k processor, and there were 3 kinds of shifts you could do. Linear shift, circular shift, and circular shift with extend. The last one, circular ...

GCC compiler provides a set of builtins to test some processor features, like availability of certain instruction sets. But, according to this thread we also may know certain cpu features may be no...

Is the following code valid to check if a CPU supports the SSE3 instruction set? Using the IsProcessorFeaturePresent() function apparently does not work on Windows XP. bool CheckSSE3() { int CPUIn...

I am trying to convert an assembly program I wrote into NULL-free shellcode. However, I am unsure how to go about this for certain instructions. Some of them (in Intel syntax) include: push 0x1000 ...

Just interesting how it works in games and other software. More precisely, I'm asking for a solution in C++. Something like: if AMX available -> Use AMX version of the math library else if AVX-5...

I explicitly use the Intel SIMD extensions intrinsic in my C/C++ code. In order to compile the code I need to specify -mavx, or -mavx512, or something similar on the command line. I'm good with all...

How many instructions on zen 3 CPUs are exclusive to AMD? I am aware of only 3: mwaitx, monitorx, and clzero Also, the 3DNow! and lwp instruction sets were once AMD exclusive but they have since be...

CPUs intended to provide high-performance number crunching, end up with some kind of vector instruction set. There are basically two kinds: SIMD. This is conceptually straightforward, e.g. instead...

As far as I know, there is no instruction in SSE/AVX for loading an immediate. One workaround is loading a value to a normal register and movd, but compilers seem to think this is more costly than ...

I need to deal with bignum calculation (addition and subtraction, but I treat subtraction as equivalent to signed addition) on RISC-V and the situation is a bit complicated. What I gather from half...

I always wondered what's the purpose of the rotate instructions some CPUs have (ROL, RCL on x86, for example). What kind of software makes use of these instructions? I first thought they may be use...

I'm trying to understand the behavior of pushing and popping the stack pointer register. In AT&T: pushl %esp and popl %esp Note that they store the computed value back into %esp. I'm consider...

I have the following C/C++ code (compiler explorer link): void update_mul(int *x, int *amount) { *x *= *amount; } void update_add(int *x, int *amount) { *x += *amount; } Under both clang an...

I am not able to understand the difference between Instruction set and Instruction set architecture. I know what is an instruction set. Instruction set just defines the possible instructions we ca...

With Z2 dword ?, mov eax, Z2 works fine but movzx eax, Z2 gives "invalid instruction operands" error. I am a little confused here: even though Z2 is of same size as eax, why couldn't asse...

I'm writing an assembler. I always thought that assembly had a 1:1 correspondence between a certain assembly instruction and corresponding instruction, so I thought it would be fairly easy to...

I'm trying to learn a bit about assembly. I decided to start by looking at the generated assembly files from simple source code. Of course, I get bombarded by instructions that I have no idea what ...

Assume I'm using my Intel x64 based laptop with no dedicated GPU. I must have some GPU onboard otherwise my screen won't work, right? Are onboard GPUs typically embedded into the CPU? Does intel ...

They're one of the simplest "instructions" you could perform on a computer (they're the first ones I'd personally implement) Performing NOT(AND(x, y)) doubles execution time AND dependen...

I was asked in an interview if PUSH and POP are RISC or CISC instructions. I said that they were RISC, but they told me that they were actually CISC instructions. I suggested that ARM (a common RIS...