x86 Questions
3
I have this simple hello world program:
#include <stdio.h>
int main() {
printf("Hello, world!\n");
return 0;
}
I compiled this program with LLVM Clang (v15.0.1, built from Homeb...
Equipment asked 28/1, 2023 at 1:33
4
Solved
I am creating a little bootloader+kernel and till now I managed to read disk, load second sector, load GDT, open A20 and enable pmode.
I jumped to the 32-bits function that show me a character on ...
3
Solved
Is there a way of pushing a packed doubleword integer from XMM register to the stack? and then later on pop it back when needed?
Ideally I am looking for something like PUSH or POP for general pur...
3
I have an M1 MacBook using conda through miniforge3.
I want to use some packages not built for ARM (ifcopenshell, pythonocc-core). Mixing channels (conda-forge/osx-64 and conda-forge/osx-arm) often...
Wavemeter asked 17/3, 2022 at 15:37
7
Solved
I have a problem when I run a .py file on a Macbook Air M1:
[Running] python3 -u "/Users/kaiyuwei/Documents/graduation project/metaheuristics/run_CRO.py"
Traceback (most recent call last)...
Pyrargyrite asked 9/7, 2022 at 10:19
9
Solved
I'm looking at writing a JIT compiler for a hobby virtual machine I've been working on recently. I know a bit of assembly, (I'm mainly a C programmer. I can read most assembly with reference for op...
Rwanda asked 27/1, 2011 at 4:53
2
Solved
I'm trying to write an x86 bootloader and operating system completely in Rust (no separate assembly files, only inline assembly within Rust).
My bootloader works completely as intended within the Q...
Maurilla asked 5/7 at 0:31
3
Solved
Intel manual says that local APIC registers are memory mapped to a 4KB region, with the default address being FEE00000H. This address can be modified using IA32_APIC_BASE MSR.
Quoting SDM Vol 3, s...
0
I have been experimenting with a simple true/false sharing benchmark, which does regular load+increment+write on a pointer. Basically this:
static void do_increments(volatile size_t *buffer, size_t...
Touraco asked 30/6 at 10:55
10
Solved
I am using eclipse CDT to test the Intel instructions and below is my program:
#define cpuid(func,ax,bx,cx,dx)\
__asm__ __volatile__ ("cpuid":\
"=a" (ax), "=b" (bx), "=c" (cx), "=d" (dx) : "a" (f...
3
I'm reading the intel manual, and I see mentions of "Linear Address Space of the processor".
I'm confused as to where or what the linear address space actually is. Where in the processor ...
Xiphoid asked 25/6, 2020 at 23:24
2
Solved
How can I divide 16 8-bit integers by 4 (or shift them 2 to the right) using SSE intrinsics?
Betimes asked 9/1, 2017 at 19:32
4
Solved
2
Solved
In a 64 bit system, is there any reason ever to use the aspnet_regiis in the Framework folder as opposed to that on Framework64? Even for an app compiled to x86 I know that just registering aspnet ...
Floatable asked 25/11, 2011 at 16:17
4
Solved
I am learning assembly for x86 using DosBox emulator. I am trying to perform multiplication. I do not get how it works. When I write the following code:
mov al, 3
mul 2
I get an error. Although,...
Dehnel asked 10/12, 2013 at 15:58
1
Solved
I was testing how to get the maximum for an array of floating points:
pub fn max(n: [f64;8]) -> f64 {
IntoIterator::into_iter(n).reduce(|a,b| a.max(b)).unwrap()
}
which gives me (nightly Rust)...
Swithbert asked 8/5 at 17:20
4
Solved
I am on the hook to analyze some "timing channels" of some x86 binary code. I am posting one question to comprehend the bsf/bsr opcodes.
So high-levelly, these two opcodes can be modeled as a "loo...
Hemeralopia asked 4/2, 2019 at 2:46
1
Solved
I am a little bit confused by how movzx behaves in the following example. (Please note that I am assuming the print_int function used in my code sample works and the problem is not there but in my ...
Gadabout asked 21/4 at 9:59
7
Solved
I am looking for a pseudo random number generator which would be specialized to work fast when it is given a seed before generating each number. Most generators I have seen so far assume you set se...
3
I have a 32-bit exe that needs to dynamically load a 64-bit dll when it detects that the operating system is 64-bit. Is this possible through LoadLibrary? If not, is there another way to accomplish...
Staffer asked 17/3, 2010 at 23:24
3
Solved
Is there any data on AVX2 gather latency?
(for instance a _mm256_i32gather_ps instruction accessing a single cache line)
Parrott asked 22/7, 2013 at 14:18
3
Solved
I have read Intel 64 and IA-32 Architectures SDM vol 3A, 9.2 MEMORY ORDERING, but there was one question that kept bothering me.
If I first write to a memory address, then send an interprocessor in...
Nalor asked 28/5, 2023 at 18:8
6
I'm learning x86 assembly. I was wondering how you perform call a subroutine conditionally.
As far as I understand, jumping to a label doesn't work because the return address is not stored and ther...
7
Solved
Will modern (2008/2010) incantations of Visual Studio or Visual C++ Express produce x86 MUL instructions (unsigned multiply) in the compiled code? I cannot seem to find or contrive an example where...
Benthos asked 28/10, 2010 at 2:49
2
Solved
I need to bit scan reverse with LZCNT an array of words: 16 bits.
The throughput of LZCNT is 1 execution per clock on an Intel latest generation processors. The throughput on an AMD Ryzen seems to...
Milan asked 15/5, 2019 at 15:43
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