machine-code Questions
5
Solved
Let's take Python as an example. If I am not mistaken, when you program in it, the computer first "translates" the code to C. Then again, from C to assembly. Assembly is written in machine code. (T...
Sell asked 17/3, 2012 at 20:59
0
std::launder intentionally obfuscates the origin of a pointer for the abstract machine / the compiler so that source and result may have different lifetimes and types. When used for e.g. (static) v...
Lepus asked 30/10, 2023 at 14:23
7
Solved
I was looking at the different instructions in assembly and I am confused on how the lengths of different operands and opcodes are decided upon.
Is it something you ought to know from experience, ...
Breana asked 31/12, 2010 at 3:33
8
Solved
I've been taught that "assembly" is what you write in your files, to have your "assembler" convert it into binary code.
But I see these two terms mixed and matched in various wo...
Fungal asked 24/7, 2009 at 7:1
3
Solved
What are the differences between the byte code binary executables such as Java class files, Parrot bytecode files or CLR files and machine code executables such as ELF, Mach-O and PE.
what are the...
Truesdale asked 30/8, 2012 at 6:57
2
Solved
Mostly of a historical interest and if I were to implement 8086 compatibility for assembler, what operands are considered valid for ESC instruction?
ESC opcode, source
From 8086 Programmer's manu...
Crossbeam asked 1/3, 2017 at 23:11
3
Solved
I understand how things like numbers and letters are encoded in binary, and thus can be stored as 0's and 1's.
But how are functions stored in memory? I don't see how they could be stored as 0's a...
Propositus asked 15/8, 2014 at 23:58
2
I have copied a picture of an assignment I have on MIPS assembly.
I understand (I think) what happens in the code until the line:
beq $11, $0, 3
I understand that the code now makes a PC-RELATIVE ...
Vitrics asked 7/8, 2014 at 21:10
1
Solved
I'm trying to wrap my head around the x86 instruction encoding format. All the sources that I read still make the subject confusing. I'm starting to understand it a little bit but one thing that I'...
Dygall asked 23/8, 2021 at 20:48
1
Solved
I used a website to encode this:
movw $8, 4(%r8d,%esi,4)
and got:
encoding (hex): 67 66 41 C7 44 B0 04 08 00
Thanks to you I nearly understand everything except 2 small points:
Here we are movin...
Weltanschauung asked 31/7, 2021 at 19:23
1
Solved
In instruction encoding Default sizes are:
operand size is 32 bit
address size is 64 bit
We can use the legacy prefix:
0x66 – Operand-size override prefix
to make operand size 16. What if I want...
Purify asked 31/7, 2021 at 17:54
1
Solved
In instruction encoding we have an optional field REX prefix which is split like this:
Field contains
0100 – fixed constant value
W – 1 when using 64-bit data
R – expands the Reg field to 4 bit
X...
Haga asked 31/7, 2021 at 17:25
1
This is a question about the operand-size override prefixes in the x86-64 (AMD64) architecture.
Here is a bunch of assembler instructions (nasm) and their encodings; by new I mean the r8, ..., r15 ...
Nipa asked 7/7, 2021 at 15:57
2
Solved
Are machine code instructions fetched in little endian 4-byte words on an Intel x86-64 architecture?
Despite a common definition for word (as stated on Wikipedia) being:
The largest possible address size, used to designate a location in memory, is typically a hardware word (here, "hardware w...
Painting asked 2/7, 2021 at 18:3
0
I'm writing an assembler. I always thought that assembly had a 1:1 correspondence between a certain assembly instruction and corresponding instruction, so I thought it would be fairly easy to...
Pate asked 3/5, 2021 at 11:19
3
Solved
The encoding of
call qword ptr [rax]
call qword ptr [rcx]
is
FF 10
FF 11
I can see where the last digit (0/1) comes from (the register number), but I'm trying to figure out where the second l...
Pilsudski asked 19/3, 2013 at 22:10
1
Trying to narrow my question down so I can get past this hurdle. This isn't helping me much.
I am running NASM to see what the output of assembly is in terms of hex.
test:
@nasm -f macho64 test.as...
Rattray asked 28/1, 2021 at 1:39
5
Solved
I already tried this, I opened a a.out file with a text editor but I get only a bunch of characters with some instructions in it like:
üÙ
Foolish asked 25/1, 2011 at 16:57
3
Solved
In the RISC-V Instruction Set Manual, User-Level ISA, I couldn't understand section 2.3 Immediate Encoding Variants page 11.
There is four types of instruction formats R, I, S, and U, then there i...
Sangfroid asked 10/9, 2016 at 14:35
2
Solved
I recently started some web development, with ASP.NET and some Javascript, and something is confusing me alot.
I always read that JavaScript used to be interpreted until JIT slowly made it so chun...
Korry asked 7/6, 2020 at 0:36
1
Solved
In ARM64 assembly code, when does register number 31 mean XZR and when does it mean SP?
Creamcups asked 30/4, 2020 at 21:18
1
Solved
The EVEX.z bit is used in AVX-512 in conjunction with the k registers to control masking. If the z bit is 0, it's merge-masking and if the z bit is 1 the zero elements in the k register are zeroed ...
Ixion asked 20/3, 2020 at 16:52
1
Solved
I am reading Intel doc, vol. 1 and There is a chapter of 3.6.1
Operand Size and Address Size in 64-Bit Mode. There are three prefixes REX.W, operand-size 66 and address-size 67 prefix. And there is...
Isogloss asked 21/1, 2020 at 21:25
2
I am reading a book "Computer Organization and Design RISC-V Edition", and I came across the encoding for S-B and U-J instruction types.
Those types I have mentioned above has strange encoded imme...
Lasonde asked 16/10, 2019 at 13:40
2
Solved
In SSE the prefixes 066h (operand size override) 0F2H (REPNE) and 0F3h (REPE) are part of the opcode.
In non-SSE 066h switches between 32-bit (or 64-bit) and 16-bit operation. 0F2h and 0F3h are u...
Congou asked 8/3, 2010 at 20:9
1 Next >
© 2022 - 2024 — McMap. All rights reserved.