cortex-m Questions
9
I have an application that I am porting from the Keil IDE to build with the GNU toolchain due to license issues. I have successfully be able to set up, build, flash and run the application on the d...
4
I'm using a STM32F107 cortex m3 microcontroller. I'm using the Keil uvision IDE for the project. I have an application which is running properly at the starting location i.e 0x0800 0000. If I chang...
2
Solved
Introduction
I am a student who wants to roughly measure the interrupt latency of ARM Cortex-M series chips without using an oscilloscope. However, I have encountered a very peculiar issue that has...
2
In the ARM documentation, it mentions that
The Cortex-M4 processor supports ARMv7 unaligned accesses, and
performs all accesses as single, unaligned accesses. They are
converted into two or mo...
4
I'm trying to get multicore working on my pico,
#include <stdio.h>
#include "pico/stdlib.h"
#include "pico/multicore.h"
void core1_main()
{
stdio_init_all();
while (1...
Molnar asked 7/5, 2022 at 20:31
2
Solved
2
On the STM32F103, the erasing of a flash page takes 20ms during which the core stalls for me. It's not clear from the ST PM00042 Flash programming manual whether the core would always stall when er...
3
Solved
I'm writing some assembly code for the Cortex-M4, specifically the STM32F407VG found in the STM32F4DISCOVERY kit.
The code is extremely performance-sensitive, so I'm looking to squeeze every last c...
Fatshan asked 12/5, 2023 at 5:20
2
Solved
I used "Exhuberant ctags" to index all the tags from my c-project. The c-project is embedded software for a Cortex-M7 microcontroller. The result is a tags-file. I'm trying to read this file and un...
Taliesin asked 30/1, 2017 at 10:39
2
Solved
I've been looking for a list of the opcodes used in ARM Cortex M3/M4/M4F, without luck.
There are plenty of [online] references to the 32-bit format of ARM instructions.
References to Thumb-2 instr...
Acidhead asked 28/12, 2014 at 13:15
3
Solved
I have an object that has an address that is not 4-byte aligned. This causes a HardFault error in the cpu when there is a STR instruction saving 2 registers.
This is the generated code:
00000000 &...
Zelikow asked 16/8, 2013 at 8:39
1
Solved
Pre ARMv6 MPUs/MCUs have SWP instruction (e.g. good ole and still alive ARM7TDMI). In ARMv6 architecture LDREX/STREX pair has been introduced and SWP removed. However with one exception – ARMv6-M (...
2
Solved
According to the Rust Embedded Book about concurrency, one of the better ways to share some data between contexts is using mutexes with refcells. I understand how they work and why this is necessar...
3
I am working on an ARM Cortex-M3 controller which has the Thumb-2 instruction set.
Thumb mode is used to compress the instruction to a 16-bit size.
So size of code is reduced. But with normal Thumb...
3
Solved
I have the following instruction: mov r1, r7 in my assembly code but after looking into disassembly, I've found that actual generated code was adds r1, r7, #0
I checked with ARMv6-M Architecture Re...
Elect asked 6/3, 2022 at 21:8
4
In the Cortex-M3 instruction set, there exist a family of LDREX/STREX instructions such that if a location is read with an LDREX instruction, a following STREX instruction can write to that address...
5
Solved
12
I want to generate a sine signal in C without using the standard function sin() in order to trigger sine shaped changes in the brightness of a LED. My basic idea was to use a lookup table with 40 p...
2
Does anyone have (or can easily write) an optimal inline assembly function for the ARM Cortex M0+ processor in Thumb mode to multiply two 32-bit numbers and return a 64-bit number?
As the M0+ does...
Sera asked 25/4, 2014 at 3:25
3
Solved
I am writing a code for Cortex-M3 cpu and I am performing unit testing using qemu-arm binary. For now everything works just fine. But I am wondering If I am able to test whole system using qemu-sys...
2
Solved
I am compiling this code for a Cortex M7 using GCC:
// copy manually
void write_test_plain(uint8_t * ptr, uint32_t value)
{
*ptr++ = (u8)(value);
*ptr++ = (u8)(value >> 8);
*ptr++ = (u8)(...
Eller asked 14/6, 2018 at 22:35
2
I am reading through Cortex M4 TRM to understand instruction execution cycles. However, there are some confusing description there
In Table of Processor Instuctions, STR takes 2 cycles.
Later in L...
Honeycomb asked 5/8, 2020 at 8:37
3
I have a 64 bit integer variable on a 32 bit Cortex-M3 ARM controller (STM32L1), which can be modified asynchronously by an interrupt handler.
volatile uint64_t v;
void some_interrupt_handler() {
...
2
Solved
In a realtime application¹ on an ARM Cortex M3 (similar to STM32F101), I need to poll a bit of an internal peripheral's register until it's zero, in as tight a loop as possible. I use bit banding t...
Lacerated asked 17/1, 2020 at 16:3
1
Solved
I've been experimenting a bit with execution from RAM and flash memory on embedded systems. For rapid prototyping and testing I'm currently using an Arduino Due (SAM3X8E ARM Cortex-M3). As far as I...
Finnish asked 29/11, 2019 at 15:17
1 Next >
© 2022 - 2025 — McMap. All rights reserved.