instructions Questions
1
Solved
On the one hand, Wikipedia writes about the steps of the out-of-order execution:
Instruction fetch.
Instruction dispatch to an instruction queue (also called instruction buffer or reservation...
Discord asked 23/9, 2016 at 21:47
2
(The i9100 and i9100p phones have Exynos 4210 SoC which includes Cortex A9 dual core 1.2Ghz processor which supports NEON.)
I will compile the latest busybox source snapshot available and upload i...
Jehius asked 14/3, 2014 at 15:37
1
I want to get xor value of two register.But compile return error how to write XOR in assembly(ARM)
XOR r1,r1,r0;
compiler gives like error,
Error: bad instruction `xor r1,r1,r0'
Flatcar asked 25/7, 2016 at 20:59
2
Solved
I have very long byte arrays that need to be added to a destination array of type short (or int).
Does such SSE instruction exist? Or maybe their set ?
Laurinda asked 17/5, 2012 at 14:2
1
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If you look at documentation of operations like cmp, test, add, sub, and and, you will notice that operations that involve register EAX and its 16 and 8 bit variants as the first operand have a dis...
Nadeau asked 24/6, 2016 at 17:52
2
I hope you can help me.
I am taking a class on Artificial Intelligence and I'm required to install Clojure on my laptop. I have a macbook pro and I am having a tough time trying to make sure I hav...
Bubalo asked 27/1, 2016 at 1:46
1
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Is there any condition where the return address is not pushed into stack during a function call in x86 architecture?
Eyeleen asked 13/11, 2015 at 2:50
1
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What is the difference between a machine instruction and a micro-op? I found a following definition here:
A small, basic instruction, used in series to make up a high-level
machine instruction
...
Synecology asked 8/10, 2015 at 22:14
4
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What the function is of the 0x10 in regards to this LEAL instruction? Is it a multiply or addition or is something else?
leal 0x10(%ebx), %eax
Can someone please clarify? This is x86 assembler o...
Affiliate asked 23/10, 2010 at 12:11
2
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In AVX there are two instructions to do a bitwise-or VORPD and VORPS. The docs say:
VORPD (VEX.256 encoded version)
DEST[63:0] <- SRC1[63:0] BITWISE OR SRC2[63:0]
DEST[127:64] <- SRC1[...
Helsinki asked 21/12, 2012 at 13:16
3
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I am currently trying to speed up some of my C functions on a Cortex-M0 (Freescale KL25Z) using assembly. I get a problem with this minimal test program:
@.syntax unified
.cpu cortex-m0
.text
.gl...
Clichy asked 22/6, 2015 at 12:35
5
Are there any such processors which have instructions to bypass the cache for a specific data? This question also has an answer which suggests that SSE4.2 instructions do bypass the cache. Can some...
Gabbert asked 13/6, 2013 at 17:36
1
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I've read that short jumps are to be used when the relative jump is less than 124 in address, and long jumps should be used otherwise.
What is the difference in terms of operations performed in th...
Eggnog asked 28/3, 2015 at 10:11
1
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Context:
Learning GAS assembly on 64 bit linux.
Many tutorials are for 32-bit assembly.
Difficult to bushwhack through x86_64 assembly.
Question:
When I compile a c program with gcc, I still see so...
Mcdonnell asked 17/2, 2015 at 9:10
1
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I'm trying to figure out what purpose jp/jnp instructions serve in LLVM-generated C code. Sample:
int main(int argc, const char * argv[]) {
double value = 1.5;
if (value == 1.5) {
value = 3.0;...
Thorathoracic asked 28/1, 2015 at 0:50
1
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I just started learning architecture and I have some confusions between MIPS and ARM architectures.
I came to know that the MIPS predominantly has two instruction formats: I and R (J as well). I r...
Orelie asked 2/11, 2014 at 6:22
16
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Can you think of any legitimate (smart) uses for runtime code modification (program modifying it's own code at runtime)?
Modern operating systems seem to frown upon programs that do this since th...
Ross asked 4/4, 2011 at 7:16
1
I'm confused where to use cmov instructions and where to use jump instructions in assembly?
From performance point of view:
What is the difference in both of them?
Which one is better?
...
Christiniachristis asked 2/10, 2014 at 4:28
4
Solved
I'm trying to identify if MATLAB or R has a function that resembles the following.
Say I have an input vector v.
v = [1, 3, 1, 2, 4, 2, 1, 3]
I want to generate a vector, w of equivalent length...
Dongola asked 20/8, 2014 at 9:19
1
I just started learning about micro controllers and I was not able to understand how we could introduce delays in the code without using timers.
My board has a clock of 16MHZ. Let's say I want to ...
Lanellelanette asked 5/5, 2014 at 16:56
2
Solved
Lets say I have the following instructions in x86
add dh, dl ; These are both unsigned integers.
jb loc_123456
What does jb signify in this context? Generally it means "jump if below", but I'm n...
Dornick asked 29/4, 2014 at 16:42
3
Solved
In the Intel manual, there are tables containing listings of Performance-Monitoring Counters, but they are extremely specific to the particular processor family.
For example, one table lists the c...
Pinder asked 12/3, 2014 at 6:57
1
Many processors have instructions which are of uniform format and width such as the ARM where all instructions are 32-bit long. other processors have instructions in multiple widths of say 2, 3, or...
Girth asked 31/1, 2014 at 13:36
2
I would like to know if current cpus avoid multiplying two numbers when at least one of them is a zero. Thanks
Chet asked 17/2, 2012 at 17:20
1
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Why does NASM use 0x89 opcode (137) when it assembles a MOV instruction between two registers?
Here is an example of code assembled using NASM:
55 push ebp
89E5 mov ebp, esp
83EC04 sub esp, byte ...
Lindgren asked 19/10, 2013 at 15:20
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