instructions Questions
1
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I thought that there was zero. But, I see here,
Instructions with two memory operands are extremely rare
I can't find anything that explains what instructions, though rare, exist. What are the...
Siddra asked 30/9, 2018 at 0:10
1
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I am currently trying to understand the inner code of the glibc's syscall function. Below is the code (taken from here).
/* In the EABI syscall interface, we don't need a special syscall to
imple...
Spinach asked 22/8, 2018 at 7:57
1
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FJCVTZS is "Floating-point Javascript Convert to Signed fixed-point, rounding toward Zero". It is supported in Arm v8.3-A chips and later. Which is odd, because you don't expect to see Ja...
Legpull asked 21/6, 2018 at 10:49
2
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I recently ran into a bug where a python library used a certain CPU instruction which existed on one x86 processor but not on another, resulting in an unexpected crash of the program (Illegal instr...
Freemon asked 24/5, 2018 at 19:4
2
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What is the difference between dynamic and static instruction count?
a. Derive an expression to calculate the user CPU time as a function
of following parameters: the dynamic instruction count...
Ecclesiasticus asked 19/11, 2012 at 16:32
2
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IDM says the memory op uses SS segment if EBP is used as base register. As a result, [ebp + esi] and [esi + ebp] references SS and DS segments, respectively. See NASM's doc: 3.3 Effective Address.
...
Heathendom asked 8/4, 2018 at 19:19
3
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I'm designing a simple toy instruction set and accompanying emulator, and I'm trying to figure out what instructions to support. In the way of arithmetic, I currently have unsigned add, subtract, m...
Theological asked 31/1, 2014 at 8:16
2
In the homework for day one of Xeno Kovah's Introduction to x86 Assembly hosted on OpenSecurityTraining, he assigns,
Instructions we now know(24)
NOP
PUSH/POP
CALL/RET
MOV/LEA
ADD/SUB
JM...
Dreadnought asked 27/2, 2018 at 19:57
1
In 32-bit mode Intel solves the VEX prefix vs LDS/LES conflict by inverting the high bits of register extension, because the mod field of ModRM byte can't be 11b
The VEX prefix's initial-byte va...
Juliojulis asked 18/2, 2018 at 15:20
1
I think,since memory of intel microprocessors is byte organized and size of instruction queue is 4 bytes,the answer would be 4 instructions?
Rentier asked 25/1, 2018 at 7:42
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I have an assignment where, among other things, I need to look in an .asm file to find a certain instruction and "reverse engineer" (find out) what part of the C code causes it to be executed on an...
Solubility asked 18/12, 2017 at 10:8
1
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mov ecx, 16
looptop: .
.
.
loop looptop
How many times will this loop execute?
What happens if ecx = 0 to start with? Does loop jump or fall-through in that case?
Solidus asked 23/10, 2017 at 2:49
2
So I am new to Python. This may be a very foolish question, but I have no idea how to install packages as pytest?
It would be great if somebody could give instructions in order to achieve this.
Gump asked 15/1, 2014 at 23:15
3
I wanted to test if bitwise operations really are faster to execute than arithmetic operation. I thought they were.
I wrote a small C program to test this hypothesis and to my surprise the additio...
Enwrap asked 27/9, 2017 at 7:44
3
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The closest I have gotten to assembly is building my own Java Class library which loads class files and allows you to create, compile, and decompile classes. While endeavoring this project, I wonde...
Trant asked 6/4, 2017 at 12:19
4
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The pause instruction is commonly used in the loop of testing spinlock, when some other thread owns the spinlock, to mitigate the tight loop. It's said that it is equivalent to some NOP instruction...
Adamson asked 18/1, 2011 at 15:9
3
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Do you know this
Well I want create something like this screen. When I open for the first time the application I want open this screen and display a context.. How is possible? I don't know ...
Tapia asked 12/11, 2013 at 10:52
1
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There's this related question: GCC: how is march different from mtune?
However, the existing answers don't go much further than the GCC manual itself. At most, we get:
If you use -mtune, then t...
Parricide asked 12/6, 2017 at 1:42
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I am new in postgresql and I try to understand explain (buffers, analyse) instruction. I have a query and I execute it using explain (buffers, analyse).
The first time i execute it the performanc...
Selfhood asked 10/5, 2017 at 8:29
2
I am looking at an Intel-x86 program trace and came across this instruction
REP MOVS BYTE PTR ES:[EDI],BYTE PTR DS:
I know that
REP MOVS
causes the MOV instruction to be run a number of tim...
Villalba asked 20/5, 2014 at 22:17
1
As is noted in Getting Started with LLVM Core Libraries there are three distinct instruction schedulers in the LLVM backend. One of them runs before register allocation and it can be selected using...
Beckham asked 16/2, 2017 at 23:8
8
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I am trying to understand some assembly.
The assembly as follows, I am interested in the testl line:
000319df 8b4508 movl 0x08(%ebp), %eax
000319e2 8b4004 movl 0x04(%eax), %eax
000319e5 85c0 te...
Spotter asked 29/9, 2008 at 1:22
2
During an interview I was asked if I knew x64 instructions that behave differently depending on the CPU used, I couldn't find any documentation on that anywhere, does anyone know what these instruc...
Alkyne asked 15/11, 2016 at 23:56
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I'm talking about data movement instructions in the x86-64 Intel architecture. I have read that the regular movq instruction can only have immediate source operands that can be represented as 32-bi...
Viv asked 29/10, 2016 at 3:38
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I have an assembly test soon, and while preparing, I noticed something strange.
repe movsb was repeating while ZF=0, and I was teached that repe should repeat while CX not equal to zero and while Z...
Heavyarmed asked 24/10, 2016 at 13:17
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