memory-model Questions
1
Solved
For stores performed on an object of an atomic data type (say, std::atomic<uint8_t>), GCC generates:
MOV instruction in case of release-store (std::memory_order_release),
XCHG instruction in...
Gujarat asked 5/5, 2021 at 8:11
5
Solved
In chapter 17 of JLS, it introduce a concept: happens-before consistent.
A set of actions A is happens-before consistent if for all reads r in A, where W(r) is the write action seen by r, it is ...
Hexahedron asked 15/8, 2012 at 13:45
3
CPUs such as ARM have the weak memory model. Assume we have two threads T1 and T2.
| T1 | T2 |
|---------|---------|
| Instr A | Instr C |
| Instr B | Instr D |
In a weak order any instruction can...
Bootle asked 15/11, 2019 at 3:40
2
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I have read a lot of posts and watched several Youtube videos C++ atomic and memory model (ConCpp 17, 14).
When I read the book Concurrency In Action, section 5.3.3, RELAXED ORDERING, I still cann...
Kaule asked 14/4, 2019 at 22:39
3
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From the link:
What is the difference between load/store relaxed atomic and normal variable?
I was deeply impressed by this answer:
Using an atomic variable solves the problem - by using atomics a...
Etter asked 17/12, 2020 at 7:38
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The paper N4455 No Sane Compiler Would Optimize Atomics talks about various optimizations compilers can apply to atomics. Under the section Optimization Around Atomics, for the seqlock example, it ...
Lentz asked 23/11, 2020 at 21:3
1
I watched this Herb Sutter talk: https://channel9.msdn.com/Shows/Going+Deep/Cpp-and-Beyond-2012-Herb-Sutter-atomic-Weapons-2-of-2
Around the 1:25 mark, he talks about why the decrement of an atomic...
Dustydusza asked 16/10, 2020 at 3:48
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I was reading about [[carries_dependency]] in this SO post.
But what I could not understand is the below sentences in the accepted answer :
"In particular, if a value read with memory_order_c...
Squander asked 29/9, 2020 at 5:9
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Shared-memory multiprocessing systems typically need to generate a lot of traffic for cache coherence. Core A writes to cache. Core B might later read the same memory location. Therefore, core A, e...
Arlettaarlette asked 27/6, 2020 at 19:49
1
Why are Python integers implemented as objects?
The article Why Python is Slow: Looking Under the Hood as well as its comments contain useful information about the Python memory model and its ram...
Chauchaucer asked 6/6, 2020 at 19:3
2
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Consider an
std::atomic<int> x(0);
Let's suppose I have a function doing the following:
int x_old = x.fetch_add(1,std::memory_order_acq_rel);
Based on the description for acquire release me...
Privett asked 17/11, 2016 at 7:35
4
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Stores are release operations and loads are acquire operations for both. I know that memory_order_seq_cst is meant to impose an additional total ordering for all operations, but I'm failing to buil...
Photocopier asked 9/9, 2012 at 16:26
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I want to use standalone memory barriers between atomic and non-atomic operations (I think it shouldn't matter at all anyway). I think I understand what a store barrier and a load barrier mean and ...
Parabasis asked 10/5, 2020 at 10:55
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I think C++ does not cover any sort of transaction memory yet, but still TSX can somehow fit using "as if rule" into something that is governed by C++ memory model.
So, what happens on successful ...
Videogenic asked 21/4, 2020 at 4:40
3
A full/general memory barrier is one where all the LOAD and STORE operations specified before the barrier will appear to happen before all the LOAD and STORE operations specified after the barrier ...
Discomfit asked 25/8, 2014 at 1:47
2
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This question is a follow-up/clarification to this:
Does the MOV x86 instruction implement a C++11 memory_order_release atomic store?
This states the MOV assembly instruction is sufficient to per...
Insulin asked 20/2, 2020 at 6:40
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In regards to std::atomic, the C++11 standard states that stores to an atomic variable will become visible to loads of that variable in a "reasonable amount of time".
From 29.3p13:
Implementat...
Stormy asked 19/2, 2020 at 2:22
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I am struggling with Section 5.1.2.4 of the C11 Standard, in particular the semantics of Release/Acquire. I note that https://preshing.com/20120913/acquire-and-release-semantics/ (amongst others) s...
Astrodynamics asked 9/2, 2020 at 16:0
1
Whilst trying to understand how SubmissionPublisher (source code in OpenJDK 10, Javadoc), a new class added to the Java SE in version 9, has been implemented, I stumbled across a few API calls to V...
Archerfish asked 7/2, 2020 at 18:30
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C++ supported atomic thread fences, that is fences guaranteeing properties for thread that use std::atomic<> operations, with the function atomic_thread_fence. It takes a memory order paramet...
Banderole asked 13/12, 2019 at 4:44
4
This is a follow up question to this one.
I want to figure exactly the meaning of instruction ordering, and how it is affected by the std::memory_order_acquire, std::memory_order_release etc...
I...
Cow asked 8/1, 2020 at 17:53
3
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from http://en.cppreference.com :
Relaxed ordering Atomic operations tagged std::memory_order_relaxed are not synchronization operations, they do not order memory. They only guarantee atomicity an...
Undersigned asked 13/12, 2014 at 19:45
2
I am now learning C++11 memory order model and would like to understand the difference between memory_order_relaxed and memory_order_consume.
To be specific, I am looking for a simple example wher...
Panda asked 9/7, 2016 at 10:3
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C++11 introduced a standardized memory model, but what exactly does that mean? And how is it going to affect C++ programming?
This article (by Gavin Clarke who quotes Herb Sutter) says that,
The m...
Literary asked 11/6, 2011 at 23:30
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Is there any wording in the standard that guarantees that relaxed stores to atomics won't be lifted above the locking of a mutex? If not, is there any wording that explicitly says that it's kosher ...
Canst asked 3/8, 2017 at 5:4
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