I have been able to boot a powerpc based system (MPC8544DS to be specific) using the following way to invoke qemu (v1.7.0) qemu-system-ppc -M mpc8544ds -m 512 -kernel zImage -s -nographic -initrd...

When I'm passing a complex float(complex.h) from a c++ caller to a c library, the value does not pass correctly when running on a 32 bit power pc. I was using two different open source software lib...

I need to write a program on bare-metal PowerPC system. As a newbie to bare-metal programming without OS/bootloarder, I decide to write a hello world program to start. I googled some post about thi...

I'm using gdb 7.4.1 on embedded powerpc target to perform some analysis on my multi-threaded C++ program that uses pthreads. My end goal is to script gdb with python to automate some common analysi...

I am trying to install pytorch using conda on power 8 IBM machine. Although, I read articles from IBM blog, I couldn't install with success because I got stuck with compiling magma.

There should be a standard, board and architecture independent way to do this just like there is with initfamfs, no? I'm using powerpc and linux-3.10, if it matters. If there are better facilities...

On Darwin, the POSIX standard clock_gettime(CLOCK_MONOTONIC) timer is not available. Instead, the highest resolution monotonic timer is obtained through the mach_absolute_time function from mach/ma...

When a out-of-order processor encounters something like LOAD R1, 0x1337 LOAD R2, $R1 LOAD R3, 0x42 Assuming that all accesses will result in a cache miss, can the processor ask the memory contro...

I've read the other posts here, but still have a question about PPC and rlwinm. The example I'm looking at is: li r0, 0x100 clrlslwi r9, r0, 27,5 (which afaik is the same as rlwinm r9, r0,5,22,26...

I have a makefile that works transparently for Linux (x86_64) and OS X Intel (x86_64). This uses 64-bit specific GCC options. Is there a way to adjust the makefile so that I could build for 32-bit...

I'm trying to find a way to perform an indirect shift-left/right operation without actually using the variable shift op or any branches. The particular PowerPC processor I'm working on has the qu...

I want to test some use-cases which need to run on 'ppc64le' architecture but I don't have a host machine with ppc64le architecture. My host system is of x86_64 architecture. Is it possible to ru...

I'm suffering GCC inline assembly on PowerPC. The program compiles fine with -g2 -O3, but fails to compile with -g3 -O0. The problem is, I need to observe it under the debugger so I need symbols wi...

I have an assembly program that has the following code. This code compiles fine for a intel processor. But, when I use a PPC (cross)compiler, I get an error that the opcode is not recognized. I am ...

GCC implements __sync_val_compare_and_swap on PowerPC[64] as: sync 1: lwarx 9,0,3 cmpw 0,9,4 bne 0,2f stwcx. 5,0,3 bne 0,1b 2: isync GCC documents for the __sync_* builtins: In most case...

Our build setup is backed into a large docker container (basically a 2 GB image coming with a complete X86 linux in itself). We have two ways to actually build: the official approach is jenkins e...

I have a device tree file (.dts) and I want to compile the file for my powerpc based board. How can I do it on my machine, which is not powerpc based?? Can I do it with the DTC installed on my Ubu...

I'm currently trying to build a configuration to test some code on Big-Endian systems. Through chats and research, i've been convinced that a good target for these tests would be the PowerPC archi...

I'm constrained by a 128Kb limit executable size for an embedded PowerPC system. Unfortunately, using option -Os to optimize for size does not work due to what I believe is a compiler bug (link wit...

I'm having a bit of trouble understanding the rlwinm PPC Assembly instruction (Rotate Left Word Immediate Then AND with Mask). I am trying to reverse this part of a function rlwinm r3, r3, 0, 28,...

I'm working on an SHA-256 implementation using Power8 built-ins. The performance is off a bit. I estimate it is off by about 2 cycles per byte (cpb). The C/C++ code to perform SHA on a block looks...

In GCC with a C++ method defined in a header file, is it possible to use the attribute syntax? Can someone provide an example for me please. The following code does not work: class foo { public: ...

I'm working on a PowerPC machine with in-core crypto. I'm having trouble porting AES key expansion from big endian to little endian using built-ins. Big endian works, but little endian does not. T...

I've a heard a lot about Altivec registers but I don't even find it on a POWER9 ISA. On that document I only find VR and VSR registers under Chapter 6 "Vector Facility" and Chapter 7 "Vector-Scalar...

I'm writing C code and compile it for the PowerPC architecture. That said C code contains floating point variable constants which I want to be placed in the .text section instead of .rodata so the ...