I am not able to understand the difference between Page Size and Page Table Entry size. From my understanding, Page size is used to divide the Page table in equal no. of blocks called Pages and th...

There are the words in linux/Documentation/x86/x86_64/5level-paging.rst Original x86-64 was limited by 4-level paging to 256 TiB of virtual address space and 64 TiB of physical address space. I k...

I'm writing a small x86-64 OS I boot with UEFI. I am trying to make the kernel a higher half kernel by shifting the executable of the kernel to 0x800000000000. This address should be halfway throug...

I am trying to understand how multi-level page table saves memory. As per my understanding, Multi-level page table in total consumes more memory than single-level page table. Example : Consider a...

I've been studying about paging and page tables. I don't see to understand where page tables are located. In one of the answers from stack exchange(https://unix.stackexchange.com/questions/487052/...

Currently I'm developing some research-related programs and I need to find the pte of some specific addresses. My development environment is Juno r1 board (CPUs are A53 and A57 ) and it's running a...

Every PTE (page table entry) in this setting has a G-bit (G = Global), which controls the scope of the physical page mapped by this entry. If the G-bit is set, then the entry is global to all proc...

First of all, I’m sorry for so long question. I do some simulation modeling task and I need to translate user space virtual address into kernel space physical addresses. I used three different meth...

Is page table updated when an entry is evicted from TLB? and if so, why? what information is updated in the page table? I think updating page table is not needed when the evicted page is clean. Si...

I have been hearing the term address space often in microprocessors and microcontrollers Paradigm. I understand that an address is used to refer to a particular block of memory in the physical memo...

My understanding is that shadow page tables eliminate the need to emulate physical memory inside of the VM. ie. Instead of: guest OS -> VMM + virtual physical memory -> host OS -> host hardwa...

I feel confuse in page table management in Linux kernel ? In Linux kernel space, before page table is turned on. Kernel will run in virtual memory with 1-1 mapping mechanism. After page table is t...

From a software point of view, what is the latency between an instruction that dirties a memory page and when the core actually marks the page dirty in the Page Table Entry (PTE)? In other words, ...

Does every process have its own page table or does it simply add it's page entries into one big page table?

Consider a virtual memory system with a 38-bit virtual byte address, 1KB pages and 512 MB of physical memory. What is the total size of the page table for each process on this machine, assuming tha...

I need to use two bits of the PTE to store a custom "state" value that my kernel module will use when intercepting page protection faults. I am developing on a Galaxy Nexus which has an A...