Updating page table when an entry is evicted from TLB

Question

Is page table updated when an entry is evicted from TLB? and if so, why? what information is updated in the page table? I think updating page table is not needed when the evicted page is clean.

Similarly, is page table updated when a page is cached (brought in) in TLB?

Noyes

Typically, the accessed indicator in the page table entry is updated (in the page table) when the PTE is loaded into the TLB (if it was not already set). The dirty indicator would be updated on a write even on a TLB hit. (I.e., most TLBs are write-through.) It would be possible to support a write-back TLB, and such might be desirable for a TLB with more than one PTE associated with each virtual address tag. – Weiler

@PaulA.Clayton, thank you for the answer. A question just to understand this better. Why is it needed to update the access indicator field in the PTE of the page table in time of TLB load? In other words, in what situations would the access indicator field help? – Noyes

Answer 1

A hardware page table walker (such as defined for x86) can modify accessed and modified indicators as part of loading the page table entry (PTE). Since a PTE can be demand-loaded on a non-write miss, it is possible for the modified indicator to be changed after the PTE has been loaded into the TLB. (It is also possible for PTEs to be prefetched into a TLB, in which case even the accessed indicator might need to be set after the PTE has been inserted into the TLB. Traditional clustered TLB entries, which store more than one PTE per entry with a single tag like subblocking for a regular memory cache, could naturally benefit from prefetching the other page(s) associated with a tag since it involves no extra storage (i.e., no cache pollution effect from such prefetching) and adjacent PTEs are stored within an aligned chunk (for typical multilevel page tables) that would already be fetched from memory.)

TLBs typically use a write-through strategy. This has the advantage of having the cache block in which the PTE resides being recently used. It may also avoid the need to use interprocessor interrupts when clearing accessed or dirty bits. Because TLBs are typically not coherent, using write-back makes software-enforced coherence (when the OS clears accessed or dirty bits) more involved.

Some hardware TLB management architectures do not support hardware setting accessed and dirty indicators. Instead an exception is generated and software handles these special cases. Since setting these indicators is not as rare as changing the address translation or permissions, there can be some advantage to doing such without requiring OS involvement.

(Dirty indicators are used to allow the OS to avoid (unnecessarily) writing back a page that is not dirty when the page is removed from memory. Accessed indicators are used to support a (typically recency-based) page replacement algorithm in the OS.)

Weiler

Great! Very helpful. So accessed indicators are used by OS for page replacement management. Now I understand why accessed indicators of a PTE are updated when a PTE is cached in TLB. What I don't understand is updating accessed indicators when a PTE is evicted from TLB. That seems a bit redundant to me. – Noyes

@Noyes In general TLBs are write-through so memory is not updated when the PTE is evicted from the TLB. A write-back TLB is theoretically possible, in which case updating the PTE in memory on eviction from the TLB would occur if the PTE was changed. – Weiler