ARM Linux Page Table Entry format -- unused bits?

Question

I need to use two bits of the PTE to store a custom "state" value that my kernel module will use when intercepting page protection faults.

I am developing on a Galaxy Nexus which has an ARM Cortex A9 (ARM v7, I believe). Linux kernel version 3.0.31. The Linux PTE definitions are as follows (from arch/arm/include/asm/pgtable.h):

/*
 * "Linux" PTE definitions.
 *
 * We keep two sets of PTEs - the hardware and the linux version.
 * This allows greater flexibility in the way we map the Linux bits
 * onto the hardware tables, and allows us to have YOUNG and DIRTY
 * bits.
 *
 * The PTE table pointer refers to the hardware entries; the "Linux"
 * entries are stored 1024 bytes below.
 */
#define L_PTE_PRESENT       (_AT(pteval_t, 1) << 0)
#define L_PTE_YOUNG         (_AT(pteval_t, 1) << 1)
#define L_PTE_FILE          (_AT(pteval_t, 1) << 2) /* only when !PRESENT */
#define L_PTE_DIRTY         (_AT(pteval_t, 1) << 6)
#define L_PTE_RDONLY        (_AT(pteval_t, 1) << 7)
#define L_PTE_USER          (_AT(pteval_t, 1) << 8)
#define L_PTE_XN            (_AT(pteval_t, 1) << 9)
#define L_PTE_SHARED        (_AT(pteval_t, 1) << 10)    /* shared(v6), coherent(xsc3) */

Just by looking at this list of definitions, it appears that bits 3,4,5 are available, as well as bits 11 and up. However, I know that the 20 most significant bits [31:12] are used for the page number (PFN, I believe), so I can't use any of those.

Can I freely use bits [5:3] or will that create problems? I've spent hours searching for the answer to this but I can only find documentation on how Linux uses PTE bits for x86 architecture.

UPDATE:

I have compiled a list of what I believe each PTE bit to be.

bit  0     PRESENT
bit  1     YOUNG
bit  2     MEMORY TYPES 0  B          FILE (only when not PRESENT)
bit  3     MEMORY TYPES 1  C
bit  4     AP0 
bit  5     AP1
bit  6     DIRTY
bit  7     RD_ONLY
bit  8     USER
bit  9     XN
bit 10     SHARED
bit 11     EXT_NG (no idea what this is)

bit 12     |---|
...        |PFN|
bit 31     |---|

Unfortunately I don't see a way to specify no read or write permissions, but somehow mmap with PROT_NONE still seems to work. I know how to specify read or R/W permissions, but I still need to know how to set a page to have no permissions.

Conceal

@ott, Thanks for the link. However, I'm working with ARM Linux, and the PTE structure is much more limited than that. Currently I can differentiate between "read" and "write" permissions (using L_PTE_RDONLY), but not between "read" and "none" permissions. In fact, I'm not even sure how to specify no permissions. – Conceal

What does the MMU documentation say about PTEs? Have you got ARM documentation or are just hoping to figure it all out from the code? – Horizon

I have the "ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition," but I'm having difficulty interpreting it. The problem is that there seems to be a hardware PTE format and then Linux puts an additional software PTE format on top of that, where some of the software PTE bits correspond directly to the hardware PTE and some don't. I've edited my original question with what I believe to be the PTE bit layout. – Conceal

So I have solved my problem with a different approach. Instead of trying to set/clear permission bits to mimic no permissions, I just clear the PTE and flush the TLB entry for that page. Then I added a bit of code to the page fault handler so that if a process tries to access that page, I can intercept it. Thanks to everyone for their help though! – Conceal

Answer 1

You can try to clear the present bit in the pte, will that force a page fault?

Eckstein

Essentially, that's what I ended up doing. And yes, it does force a page fault, which Is what I needed to happen. – Conceal