i have a few questions about the "read-only-rootfs" feature from the yocto project, the documentation is not that helpful unfortunately. So adding that to the EXTRA_IMAGE_FEATURES makes the yocto ...

I've been banging my head with this for the last 3-4 days and I can't find a DECENT explanatory documentation (from ARM or unofficial) to help me. I've got an ODROID-XU board (big.LITTLE 2 x Cortex...

When reading ARM arch. ref. manual v7, I've found two concepts; point of coherency (PoC) and point of unification (PoU). For PoC, it looks like the point that all agents (i.e., CPU cores) can see ...

After reading the following paper https://people.freebsd.org/~lstewart/articles/cpumemory.pdf ("What every programmer should know about memory") I wanted to try one of the author's test, that is, m...

When I debug MMU in Cortex-A9 MPCore, I always see Domain Access Control Register, but, what does domain means ? up to 16 domains ? Anyone can give me a link to explain this ?

I am currently wading through the ARM architecture manual for the ARMv7 core. In chapter A3.5.3 about atomicity of memory accesses, it states: If a single-copy atomic load overlaps a single-cop...

I wanted to know how interrupt handling works from the point any device is interrupted.I know of interrupt handling in bits and pieces and would like to have clear end to end picture of interrupt h...

TTBR0/1 are CP15 registers which are programmed by PL1 OS. Now If PL1 OS1 programs TTBR0 and then on the same core the PL1 OS2 is scheduled, would the PL1 OS2 see the value of TTBR0/1 set the OS1 ...

I did some reseach, but could not find much information. I'd like to know how many L1 read and L1 write ports ARM embedded processors have and how wide the ports are. Specifically, I am intereste...

my image processing project works with grayscale images. I have ARM Cortex-A8 processor platform. I want to make use of the NEON. I have a grayscale image( consider the example below) and in my al...

I am a newbie starting out in micro-controller programming. The chip of interest here is cortex-a9. At reset or power up there has to be code at 0x0000000 from my readings. My questions though they...

Guys, I have a project which I have compiled for the ARM Cortex-A8 processor. I'm making use of GCC to do this. Currently the size of my executable is 220.1 KB. Now I modify my makefile and I add t...