state of TTBR0/1 wrt to multiple guests in case of virtualization in arm

Question

TTBR0/1 are CP15 registers which are programmed by PL1 OS. Now If PL1 OS1 programs TTBR0 and then on the same core the PL1 OS2 is scheduled, would the PL1 OS2 see the value of TTBR0/1 set the OS1

I am sure there is someway that the sanity is maintained, is the following is true?

While switching between guests the hypervisor saves all cp15 regs in guest context and later restores before switching the guest

if yes then wouldnt it be time consuming for hypervisor as the list of cp15 regs would be very long

Titoism

Answer 1

You can read the description of the registers in the ARMv7-AR Architecture Reference Manual - downloadable with registration from here.

In summary, yes - TTBR0/TTBR1 exist in only one copy (each), which is updated by the hypervisor when switching guests. The hypervisor itself has the VTTBR for its own use. This is of course the only way it is possible to host an unlimited number of guests. (The AArch64 model is somewhat different, but the same basic fact remains true.)

Clearly this is a costly operation, and not the only one required on switching guests, so you certainly don't want to do it too frequently. But the list of registers that need preserving may be shorter than you think.

You can see the actual implementation for KVM here.

Confide

The operations can be reduced if you can assume something about the hosted OS. For instance, many OSs do not use FIQ and it is possible that some may not use an MMU at all. You must do mostly the same for TrustZone. I think you can physically lock out the FIQ from the guest OSs with TrustZone and avoid the FIQ bank save/restore. This may cause a guest OS to crash or driver to deadlock. – Aleece

@Confide - ok so saving the list of cp15regs is required as I thought. I guess If switching back to same guest that list would be minimal. I am writing a POC microkernel based hypervisor where a privileged guest handles the shared h/w, that guest should always run on core 0, Now if there are 2 cores only supporting 2 normal guests would require a schedular switching between them – Titoism