This is a question inspired by this question and answer pair: call questa sim commands from SystemVerilog test bench The questions asks how Verilog code could control the executing simulator (Ques...

I want to call questa sim commands like add wave ,add list, write list from my SystemVerilog test bench task add_files_to_list(); add wave -position insertpoint sim:/top/clk add list sim:/top/clk...

I'm using the command line argument -modelsimini <modelsim.ini> to specify my own modelsim.ini file for most QuestaSim / ModelSim executables. This works perfectly fine on Linux for vcom and...

I'm trying to speed up debugging. In a large trace I'm search for particular values of a signal. Im using QuestaSim 10.0b under linux. I already found out that can be done in Modelsim/QuestaSim wi...