I am trying to understand how does a branch prediction unit work in a CPU. I have used papi and also linux's perf-events but both of them do not give accurate results (for my case). This is my co...

I am testing some of intrinsic operations' behaviors. I got surprised when I noticed that _mm_mfence() issues load instruction from user space, but it does not count in L1 data cache - miss, hit or...

I am trying to use PAPI library to count cache misses. cache hit performance counter is not available on my hardware, that's why I am trying to determine cache hits with no cache misses. I am tryin...

I want to get into PAPI. I have Version 5.3.2.0 on Debian GNU/Linux. papi_avail just tells me that no hardware events are available: $ papi_avail Available events and hardware information. ------...

What is the difference between PAPI_L1_LDM in papi and L1-dcache-load-misses in perf? I've used the same setting, like this post here. So, as a result I get for papi: PAPI_L1_DCM: 515 <- L1 d...

i am using PAPI liberary to tune and profile my application. I want to know what (PAPI_REF_CYC : Reference clock cycles ) means actually? Thanks in advance,

I am working on a project where we have to implement an algorithm that is proven in theory to be cache friendly. In simple terms, if N is the input and B is the number of elements that get transfer...

I vectorized the dot product between 2 vectors with SSE 4.2 and AVX 2, as you can see below. The code was compiled with GCC 4.8.4 with the -O2 optimization flag. As expected the performance got bet...

I asked myself what would be the best way to measure the performance (in flops) of a parallel program. I read about papi_flops. This seems to work fine for a serial program. But I don't know how I ...

On an Intel or AMD x86-64 system running Linux, where/how can I find out the number of hardware performance counters that my CPU has? I would like to use the Linux perf tool to gather hardware per...