The AVX512CD instruction families are: VPCONFLICT, VPLZCNT and VPBROADCASTM. The Wikipedia section about these instruction says: The instructions in AVX-512 conflict detection (AVX-512CD) are ...

I have a routine that performs a few MKL calls on small matrices (50-100 x 1000 elements) to fit a model, which I then call for different models. In pseudo-code: double doModelFit(int model, ...) ...

I am going to offload some computation to Xeon Phi but would like to test different APIs and different apporached to the parallel programming first. Is there a simulator / emulator for Xeon Phi (e...

I have a function defined as inline void vec_add(__m512d &v3, const __m512d &v1, const __m512d &v2) { v3 = _mm512_add_pd(v1, v2); } (the __m512d is a native data type mapping to SIM...

I was told one can run a program on MIC that was built with gcc. Is that true? If yes, how to proceed? I'm using gcc version 4.4.7.

Suppose I have a single c/c++ app running on the host. there are few threads running on the host CPU and 50 threads running on the Xeon Phi cores. How can I make sure that each of these 50 runs on...

Are there SIMD(SSE / AVX) instructions in the x86-compatible accelerators MIC Intel Xeon Phi? http://en.wikipedia.org/wiki/Xeon_Phi

Is there a way to compile Haskell to run on the Xeon Phi coprocessor? Some researchers at Intel have recently reported on the Haskell Research Compiler (that is not publicly available, which makes...

Does the Intel Xeon Phi coprocessor, to be usable as parallel platform, require a license of the Intel Composer XE compiler, or are there alternative compilers?

For testing purposes, I am writing short assembly snippets for Intel's Xeon Phi with the Icc inline assembler. Now I wanted to use masked vector instructions, but I fail at feeding them to the inli...

I'm implementing an ultra fast popcount on Intel Xeon® Phi®, as it's a performance hotspot of various bioinformatics software. I've implemented five pieces of code, #if defined(__MIC__) #include ...