The context of this question is the creation of a side-channel resistant implementation of a IEEE-754 compliant single-precision square root for a 32-bit RISC-V platform without hardware support fo...

In the context of exploratory activity I have started to take a look at integer & fixed-point arithmetic building blocks for 32-bit platforms. My primary target would be ARM32 (specifically arm...

I'm a SW developer trying to understand configuration of the RISC-V Platform-Level Interrupt Controller (PLIC) that's in a rocket-chip derived SoC in an FPGA. Please correct me if my terminology is...

I am looking for a C/C++ toolchain that supports the RISC-V vector extension v1.0 as defined per official spec. Spike appears to support vector rvv1.0, but I am having trouble finding a toolchain t...

I am very new to bare metal programming and have never delt with interrupts before, but I've been learning on a RISC-V FE310-G002 SOC powered dev board. I've been reading about the RISC-V WFI (Wait...

I am trying to understand how modern CPU works. I am focused on RISC-V. there are a few types of branches: BEQ BNE BLT BGE BLTU BGEU I use a venus simulator to test this and also I am trying to s...