I am trying to understand the specs, but fail to understand the first line of the example given: SET A, 0x30 ; 7c01 0030 Here is what I understood from the specs: the first word (7c01) fully d...

DCPU-16 (the CPU in Notch's new game) doesn't seem to have any signed IF/MUL/DIV instructions. Is there still a way to do signed arithmetic/control-flow that isn't super incredibly painful?

I'm implementing an assemblinker for the 16-bit DCPU from the game 0x10c. One technique that somebody suggested to me was using "overlays, like in Turbo Pascal back in the day" in order to swap co...

If I understand correctly, the DCPU-16 specification for 0x10c describes a 16-bit address space where each offset addresses a 16-bit word, instead of a byte as in most other memory architectures. T...

I am looking into various OS designs in the hopes of writing a simple multitasking OS for the DCPU-16. However, everything I read about implementation of preemptive multitasking is centered around ...

I'm new to racket/scheme, so i decided to learn by implemeting an emulator for the DCPU-16, a simple 16 bit processor. My question is thus: What is a better way to implement my solution? This is...

It's not clear to me whether dat "Hello" is supposed to generate 5 words or 3 (with one byte of padding)

According to the DCPU specification, the only time a SET instruction fails is if the a value is a literal. So would the following work? SET [PC],0x1000 A more useful version would be setting an...

DCPU-16 includes 8 general registers named A, B, C, X, Y, Z, I and J. It's a bit of a programmer "trope" to use I and J for loop counters. In DCPU-16, are I and J specialized registers, that should...