Why does a 4 bit adder/subtractor implement its overflow detection by looking at BOTH of the last two carry-outs?

Question

This is the diagram we were given for class:

Why wouldn't you just use C4 in this image? If C4 is 1, then the last addition resulted in an overflow, which is what we're wondering. Why do we need to look at C3?

Sept

Hint : write out the 2's complement negative numbers this thing can generate... – Mudcat

1111, 1110, 1101, 1100, 1011, 1010, 1001, 1000 – Sept

or to put it more simply, work through the computation of 0 - 1 and 1000 - 1 (deleted previous, misleading, comment) – Mudcat

I really don't known how Ci is get? Is it a bit in result of add/subtract – Vanlandingham

From a simple point of view, if you discard the C4 bit, does the result value change? It only changes when C4 and C3 differ. If they are the same, the value is the same. – Buzz

Answer 1

Overflow flag indicates an overflow condition for a signed operation.

Some points to remember in a signed operation:

• MSB is always reserved to indicate sign of the number
• Negative numbers are represented in 2's complement
• An overflow results in invalid operation

Two's complement overflow rules:

• If the sum of two positive numbers yields a negative result, the sum has overflowed.
• If the sum of two negative numbers yields a positive result, the sum has overflowed.
• Otherwise, the sum has not overflowed.

For Example:

**Ex1:**
 0111   (carry)  
  0101  ( 5)
+ 0011  ( 3)
==================
  1000  ( 8)     ;invalid (V=1) (C3=1) (C4=0)


**Ex2:**
 1011   (carry)  
  1001  (-7)
+ 1011  (−5)
==================
  0100  ( 4)     ;invalid (V=1) (C3=0) (C4=1)


**Ex3:**
 1110   (carry)  
  0111  ( 7)
+ 1110  (−2)
==================
  0101  ( 5)     ;valid (V=0) (C3=1) (C4=1)

In a signed operation if the two leftmost carry bits (the ones on the far left of the top row in these examples) are both 1s or both 0s, the result is valid; if the left two carry bits are "1 0" or "0 1", a sign overflow has occurred. Conveniently, an XOR operation on these two bits can quickly determine if an overflow condition exists. (Ref:Two's complement)

Overflow vs Carry: Overflow can be considered as a two's complement form of a Carry. In a signed operation overflow flag is monitored and carry flag is ignored. Similarly in an unsigned operation carry flag is monitored and overflow flag is ignored.

Amateurism

Answer 2

Overflow for signed numbers occurs when the carry-in into the most significant bit is not equal to the carry out.

For example, working with 8 bits, 65 + 64 = 129 actually results in a overflow. This is because this is 1000 0001 in binary which is also -127 in 2's complement. If you work through this example, you can see that it is a result of the carry out not equalling the carry in.

It is possible to have a correct computation even when the carry flag is high.

Consider

  1000 1000   = -120
+ 1111 1111   = -1

=(1) 10000111 = -121 

There is a carry out of 1, but there has been no overflow.

Rufford

Answer 3

I would like the give a more general answer to this question for any positive natural number of bits.

Lets call the last Carry output C1, the second to last Carry output C0, the sum sign output S0 and the signbits of A and B respectively A0 and B0.

Then the following holds:

• C1 = A0 + B0 + C0
• S0 = A0*B0 + A0*C0 + B0*C0

Lets now walk through the posibilities.

• If C1 == 1 there are two possibilities:
  • if C0 == 0: A0 and B0 must both have been 1 (and thus both A en B must be negative). This means S0 has to be 0 meaning the solution was positive while A en B were negative => overflow
  • if C0 == 1: either
    • A en B have opposite signs, so overflow is not possible. => no overflow
    • A0 en B0 are both 1 (and thus A en B must both be negative). This means S0 has to be 1 meaning the solution was negative => no overflow
• If C1 == 0 there are two possibilities:
  • if C0 == 0: either
    • A0 en B0 are both 0 (and thus A en B must both be positive). This means S0 has to be 0 meaning the solution was positive => no overflow
    • A en B have opposite signs => no overflow
  • if C0 == 1: A0 en B0 must both be 0 (and thus A en B must both be positive) This means S0 has to be 1 meaning the solution was negative while A en B were positive => overflow

Hope that helps someone out there.

Relict