How to use 3-input logic gates in vhdl?

Question

I am just learning vhdl, and am trying to use a 3-input nand gate. The code I have is:

G => (A nand B nand C) after 3 ns;

but this does not compile.

Prediction

what is that "after 3 ns" part of that line? Bear with me, its been a couple years since I've had to do this. Also, do you have any associated error message to go with it? – Calm

@Akron: the after 3 ns is used only for simulation. It lets the simulator properly simulate the gate delay of the real hardware. You can leave it in the code when you synthesize, but the synthesizer will ignore it. – Hyperopia

for science, you should try running (A nand B nand C) and see if it gives the same results as not(a and b and c). I think they are the same, but it would be interesting to know for certain. – Calm

See Digital Logic – Caustic

Answer 1

I'm not an expert on VHDL but I think you have a couple of mistakes there - it should probably be:

G <= not (A and B and C) after 3 ns;

i.e. the assignment is in the wrong direction and I'm not sure that nand commutes in the way that you need it to for 3 inputs, hence the use of and for the inputs and then not to invert the output.

Phosphide

Paul is right: nand does not commute. it is illegal in VHDL to write a nand b nand c. – Philanthropic

Yes, that was the problem. I was just a little mislead because the assignment only permitted the use of nand and nor gates. Thank you for your help. – Prediction

The NAND and NOR functions are the complements of AND and OR functions respectively. They are commutative, but not associative. – Caustic

Answer 2

Oh I think I may know.

G <= (A nand B nand C);

You have the assignment operator sign reversed, yes?

Really delayed edit:

VHDL will not compile with the A nand B nand C syntax presented above, this gives a syntax error. Best to do what Paul suggests and pull the not out in front of the logic.

Calm

You can't commute nand like this. You can add parentheses, e.g. G <= ((A nand B) nand C); but that still won't give the correct result. You really need to separate out the not from the and, e.g. G <= not (A and B and C); – Phosphide

Without the parentheses, wouldn't it still work exactly the way you are saying it would with the parentheses you added? – Calm

I don't have any way to try it right now but @Philanthropic confirms in a comment to my answer that it is illegal – Phosphide

Oh, thats interesting. Good to know. – Calm

Nand does not commute: ('0' nand '0') nand '1' = '0' but '0' nand ('0' nand '1') = '1' That's the reason why VHDL does not allow a nand b nand c. – Philanthropic

The NAND and NOR functions are the complements of AND and OR functions respectively. They are commutative, but not associative. So these functions can not be extended to multiple input variables very simply. NAND is Commutative. NAND is not Associative. – Caustic

Answer 3

You would have to make your three input NAND gate into a two input NAND gate by doing the following:

Then you can write the VHDL using only two inputs and it won't be illegal. If you want to write complex NAND logic, you can add a process to your architecture and then use variables to capture sub parts of your logic and then apply NAND to those subparts. Makes it easier to understand where you're at in your function.

Siamese