Offset address for JAL and JALR instrctions in RISC-V

Question

In the RISC-V specification, it is written that the immediates in JAL and JALR instructions are converted to jump offsets as :

1. Sign extend the given immediate to XLEN bits.

2. Set the LSB to zero.

I have a couple of questions regarding this.

QUESTION 1

For JAL, this gives a range :

000000000000 to 111111111110

that is, 4KiB.

Here, if the LSB is going to have to be zero always, why isn't the immediate just considered as the 12 bits before a mandatory zero LSB for the address, hence increasing the range of addresses to:

[000000000000]0 to [111111111111]0      

[ ] represents the given immediate offset, and a zero is added to the end of a given immediate offset internally. That is,

1. Left shift give address by a bit.

2. Sign extend the result to XLEN bits.

QUESTION 2

How are positive and negative offsets distinguished from one another? Is the MSB of the given offset used?

Toadeater

Only even addresses are provided for. The LSB for an even address is always 0 so it is not encoded. The encoded value is taken as signed, so is sign extended to 32 or 64 (or 128) bits as needed. – Eventful

@ErikEidt So does the immediate value provided in the instruction account for the bits : [12:1] of the address, giving the format of the jump address as [sign extension (17 bits)]:[12 bit immediate]:[0] giving a total of 32 bits? – Toadeater

JAL has a 21 bit signed range with the LSB not encoded -- it is pc-relative so the target address is pc:=pc+sxt(imm20 | 0) where | is concatenation. JALR has only a 12 signed bit range (with an LSB encoded), where it clears the LSB: after addition of the register value: pc:=(rs1+sxt(imm12))&-2 where & is bitwise masking and -2 is a mask that clears the LSB. – Eventful

@ErikEidit Thank you, that cleared it up. – Toadeater

@ErikEidit Also, is there a reason why there is a mask in JAL instead of a concatenation which would increase it's range? – Toadeater

There's no mask in JAL, its in JALR. JALR is a register indirect branch, so for most usages doesn't need an offset at all. It is user for mostly function returns, some indirect function calling (function pointers & vtables) -- neither needs any offset at all. – Eventful

@ErikEidt Thank you, it is very clear now. – Toadeater

Answer 1

JAL has a 20 bit offset and a register as operands.

Its operation is pc := pc + sxt ( imm20 << 1 ).

As you can see by the formula, the branch is pc-relative.  The immediate can reach +/- 1 MB from the JAL itself.  The immediate is shifted by one bit, the true LSB is always zero, so is not encoded.

Because RISC V supports instructions in multiples of 16-bits (two bytes), we cannot assume the next-to-LSB is also zero, as it would be with MIPS (which has 32-bit instructions).

The register operand in JAL is optionally used to capture the return address in addition to performing the branch.

JAL's function is to perform modestly far pc-relative branches or calls using its 20-bit range.  (Contrast with RISC V conditional branch instructions that have only have 12 bits for +/- 4 KB range.)

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JALR has a 12 bit offset and two registers as operands.

Its operation is pc := ( rs1 + sxt ( imm12 ) ) & -2.

As you can see by the formula, the branch is register indirect, relative to the value in rs1.

Like JAL, JALR can also capture the the return address.

JALR is used to return from a function (aka RET in assembly.  In this form $ra is used as the source register, and no return address is captured).  This uses zero for the offset (i.e. an offset is not required).

JALR is also used to perform indirect function calls: calls via function pointer, virtual method dispatches, etc..   These use also use zero for the offset.

JALR can also be used in sequence with AUIPC.

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AUIPC has a 20 bit offset and a register as operands.

Its operation is rd := pc + ( imm20 << 12 ).

It computes the upper part of a pc-relative immediate (while also providing a lower part of the pc that is not relative).

Combined with JALR, this can accomplish a 32-bit pc-relative branch or call.

AUIPC r5, labelFarAway      # AUIPC encodes upper 20 bits of label's distance from pc
JALR r5, $ra, labelFarAway  # JALR encodes the lower 12 bits of same

Eventful