How can I compile C code only for the RV32I base integer instruction and the extension M?

Question

I have started to work with risc-v few days ago, but yesterday I had a problem. The problem is the following:

I want to compile code for example for the RV32I base integer instruction set and I want to add too the "M" Standard Extension.

When I compile the C code I use the following command

riscv64-unknown-elf-gcc Program.c -o Program.o -m32 -march=RV32IM

Now if for example I want to see assembler code, I use

riscv64-unknown-elf-objdump -d Program.c > Program.dump

Now, if I explore the dump file "Program.dump" . I have noticed that sometimes appear assembly instructions as:

   10c6c:   00a12427            fsw fa0,8(sp)
   10dd0:   00a42023            sd a0,8(sp)

among many other cases.

If I see the "RISC-V Instruction Set Manual, Volume I: User-Level ISA, Version 2.0" at page 52 I observe that the fsw instruction belongs a RV32F Standard Extension and the sd instruction , it belongs to RV64I.

For this reason, I am confused I don't know if my problem is that I am not compiling well.

My question is: How can I compile C code only for the RV32I base integer instruction and the extension M?

Ohl

What is your program doing? If you are making calls to the standard library, then it will pull in code from gcc. What extensions that code uses depends on how you compiled your compiler. – Velum

Answer 1

As Chris pointed out, the problem seems to be that the libraries have not been built for RV32I.

This is a copy&paste from my instructions here for how to build a pure RV32I toolchain+libraries from git rev 5b1febd (2015-07-05) of riscv-gnu-toolchain:

sudo mkdir /opt/riscv32i
sudo chown $USER /opt/riscv32i

git clone https://github.com/riscv/riscv-gnu-toolchain riscv-gnu-toolchain-rv32i
cd riscv-gnu-toolchain-rv32i
git checkout 5b1febd

mkdir build; cd build
../configure --with-xlen=32 --with-arch=I --prefix=/opt/riscv32i
make -j$(nproc)

This will install a RV32I toolchain with the riscv32-unknown-elf- command prefix.

There seems to be a problem with --with-xlen=32 --with-arch=I in current git head of riscv-gnu-toolchain. I've now reported the issue on github.

Sculpin

Thank you Chris and CliffordVienna !!! Your support have been very helpful. I have only one more question. If I compile my code with riscv32-unknown-elf-gcc,. How can I use spike for my new Program.o riscv32. If I use spike pk -m32 Program.o, it is correct? – Ohl

@Ohl Sorry, I have never used spike myself, so I can't answer that. But you can always post another question . I'm sure someone there are some spike experts here as well.. – Sculpin

With spike, you can specify the ISA with the --isa flag. For example: spike --isa=RV32I pk – Oquassa

It's seems to be --with-arch=rv32i instead of --with-xlen=32 --with-arch=I now. – Compossible