PAE in x86-64 bit processors - Linux kernel

Question

I have noticed that the PAE bit in the CR4 register is turned on my Linux (3.19) x86-64 machine. The PAE feature allows physical addresses up to 64gb to be accessed but I do not understand why it is needed when long-mode is enabled. I have looked it up for a while but haven't found any satisfying answer.

Any suggestions?

Chambliss

Answer 1

It is using IA-32e paging.

A logical processor uses IA-32e paging if CR0.PG = 1, CR4.PAE = 1, and IA32_EFER.LME = 1.
With IA-32e paging, linear address are translated using a hierarchy of in-memory paging structures located using the contents of CR3.
IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.
Although 52 bits corresponds to 4 PBytes, linear addresses are limited to 48 bits; at most 256 TBytes of linear-address space may be accessed at any given time.

---

x86 processors supports three paging modes:

1. 32-bit paging (CR0.PG = 1 and CR4.PAE = 0)
2. PAE paging (CR0.PG = 1, CR4.PAE = 1, and IA32_EFER.LME = 0)
3. IA-32e paging (CR0.PG = 1, CR4.PAE = 1, and IA32_EFER.LME = 1)

A table summarising the differences is reported here (as image, unfortunately)

Jard