What is the minimum RISC-V instruction set that runs GNU/Linux?

Question

I want to build my own minimal RISC-V processor for a FPGA. The processor will as simple as possible with only one pipeline.

I read the entire RISC-V ISA and there are many standard extensions. So what is the minimum RISC-V ISA that can run linux?

Hipparchus

This is kind of an interesting question... I'm guessing you will probably get better answers at Unix & Linux Stack Exchange. – Gawen

The question is actually not so much about the instruction set. For Linux to work properly, you need to implement the MMU and the PLIC. In addition to RV32IMA. The MMU and PLIC are beasts to implement. Sorry. But without them you will be limited to running some dumbed down "embedded" Linux distro. – Handbill

Answer 1

As of 2020, the reasonable minimum is RV64GC, User/System mode ("U"/"S" extensions) and a page-based virtual memory system (Sv32, Sv39 or Sv48).

Note that the RISC-V Base specification (2019-06-08 ratified) expands the G (general-purpose) symbol to: IMAFD+Zicsr+Zifencei

The compressed instruction extension ("C") is also part of the base specification. The "U"/"S" extensions and virtual memory systems are part of the RISC-V Privileged Architecture specification.

Technically, RV64GC is the minimum for running a general purpose distribution such as Debian and Fedora - however, with a custom Linux you could get down to RV64IMA+Zi* or even RV32IMA+Zi* (with some patching).

Balata

Answer 2

RISC-V's IMA is the minimal set of user-level extensions for Linux plus the page-based privileged architecture.

Latreese

Answer 3

For a vanilla Linux kernel, rv32imasu + Zicsr + Zifencei, plus virtual memory and an interrupt controller. Using the kernel as intended in Supervisor mode, you can write your own firmware to run in Machine mode and implement the Supervisor Binary Interface (SBI) to handle translation to your hardware for most other misc things.

I think there might be some limited no-MMU support in the kernel, designed to run in machine mode, but I haven't tried it. I don't have real hardware without an MMU and enough memory to run a Linux kernel and I haven't tried it in an emulator.

It is also not hard to patch a Linux kernel to run without the M extension. None of the hand assembly in the kernel uses those instructions. I maintain a forked version of the kernel with that feature added: https://github.com/echelonxray/linux . Just deselect the "RISCV_ISA_M" config symbol in Kconfig when building the kernel. I tried to get this patch upstreamed, but the kernel maintainers didn't find it useful enough to want to maintain it. You can diff the master and vanilla branches if you wish to inspect the changes I made.

If you don't want to use a patched kernel, you can trap and emulate the multiplication extension instructions in your SBI firmware. It will just be slower.

Keep in mind, that you will need to build a cross compiler and libc to target rv32ia and build software to run without M. Again, you could trap the instructions, but it will be slower. I created a no-M emulator as a proof of concept here: https://www.michaelkloos.com/my_projects_blog/?p=182 .

So with a little bit of tweaking, it will run on rv32iasu, as my emulator proves.

Condescendence

Answer 4

As of 2023, there is a project that implements a minimal 32 bit RISC-V CPU in the header file of a C project. You can get away with not implementing a lot of opcodes and functionality.

The project was using a NO-MMU version of Linux, those have become popular lately for microcontrollers.

Check it out: https://github.com/cnlohr/mini-rv32ima

You can start a Linux Kernel Image within 2 seconds, or build the whole toolchain in 20-30 minutes, which is probably recommended.

One of the keys here is that a no-mmu system cannot execute two processes in parallel (they would run in the same memory space), so even just spawning a child in bash with "&" will cause errors.

You CAN however use multi-threading, since threads are meant to share the address space anyway.

The key to make those systems work is custom memory locations and custom CSRs. The Linux system is patched so that custom CSR instructions, and a write to address 0x10000000, interface with the terminal and keyboard. In this, it is similar to a 6502 based mm/io.

The project serves as a nice hint to what you can get away with, and how easy it is to implement custom IO interfaces in bare linux.

Prole