Learning Chisel -- advanced examples to understand Rocket Chip code

Question

The Berkeley implementation of RISC-V is called Rocket Chip and it is written in a hardware language called Chisel. Chisel is object oriented, and it has been difficult for the people on our team to learn to the point of being effective at modifying Rocket Chip code.

There is this Learning Journey that we created for Chisel, which is great. It goes from basics, includes relevant parts of Scala, and ends with a collection of advanced examples taken from Sodor and Rocket Chip code, all with hands-on exercises:

http://learningjourney.intensivate.com

We have opened it up to the community to contribute, but it seems there should be other good places that explain the advanced Chisel coding practices that are used in Rocket Chip code. Does anyone have links?

Kettie

Answer 1

Somes good documentations links i'm using for Chisel :

• Chisel bootcamp
• Chisel3 wiki
• Chisel3 cheat sheet

And lots of Questions & Answers on Stackoverflow of course.

Messere

Answer 2

This tutorial introduces a standalone implementation of the Rocket chip.

https://hardsecurity.github.io/docs/untether-v0.2/

Chisel design Risc-V cpu

https://fatalfeel.blogspot.com/2013/12/chisel-design-ic-for-risc-v.html

XiangShan using rocket-chip core to design risc-v cpu the link explain the cache, TLB, register file and basic design theory and teach you how to use intellij IDE set breakpoint to debug and use Vivado to see the circuit

Dibromide

Answer 3

Chipyard has decent documentation of Rocket-chip and the Tilelink/Diplomacy package.

Weatherboarding

While this link may answer the question, it is better to include the essential parts of the answer here and provide the link for reference. Link-only answers can become invalid if the linked page changes. - From Review – Fumatorium

@Fumatorium the question was "Does anyone have links?" wouldn't there be some sort of exception to the rule here? – Weatherboarding

Answer 4

It would be best for riscv.org to abandon using Chisel for their designs, as there are relatively few design engineers that use it, or want to use it. Most are using Verilog, System Verilog and VHDL. Using Chisel is building a wall between the majority of design engineers wanting to use Rocket Chip. In other words, use commonly accepted design tools used by the majority of design engineers.

Banzai

Thanks for the thoughts Kirk. I agree that introducing something new to a mature field is an uphill battle, for the exact reasons you mention. The question is, when something comes along that has aspects that are significantly better, should one just give up, and say "well, no one uses this, because it's new, so no one ever will, so don't even try"? The real question is.. what advantages does Chisel have, and what disadvantages (other than popularity, which is a social aspect, not intrinsic to the language)? Does that make Chisel worth fighting for? – Kettie

We have produced a commercial chip with the combination of Rocket Chip and FireSim. Chisel has proven productive enough that we don't use a C++ model (like GEM5) to make architectural decisions. We run real code with real workloads on FPGA. That cuts the effort to explore the architecture space, and gives us exact answers. The architecture team actually implements the Chisel directly, which isn't viable with Verilog, or even SystemVerilog. That's what we're fighting for. – Kettie

The issues we've encountered are due to Cake Pattern, and the site, here, up system for parameter passing, and difficulty in tracing wires through Chisel. We've actually started a project to make a GUI that fixes those problems. It keeps the best parts of Chisel, which is productive changes to individual modules, while solving the painful parts of Rocket Chip, when it comes to verifying things like what parameters actually reach which parts of the silicon, and tracing wires when doing timing closure and power closure. – Kettie