As far as I understand it, ARM Cortex-M CPUs are always in Thumb state, which means:
Thumb state indicated by program counter being odd (LSB = 1). Branching to an even address will cause an exception, since switching back to ARM state is not allowed.
However, while I am using CortexM0 and M4 CPU, the PC is always even. Each time I branch, the LR records PC+1 and each time I return, the PC gives LR-1.
For example, if lr = 0x0000_01D5,
Execute
BX lr
Then PC should be 0x0000_01D5, whereas it gives 0x0000_01D4.
Isn't this impossible?
Any comment will be appreciated.