I was reading about A20 line http://wiki.osdev.org/A20_Line, which seems to indicate that A20 line is disabled by default. On Pentium, if 0xFFFFFFF0 is the address put out immediately after hard reset, does it mean that A20 line is enabled by default?
How is BIOS ROM accessible at 0xFFFFFFF0 if A20 line is disabled by default?
From my understanding, the article linked in the OP is a bit misleading, and should say the A20 line is disabled by default for a legacy BIOS MBR boot sector. This would allow it to be enabled by default, and have the firmware disable it during boot if booting a legacy IBM-PC-compatible boot sector. (Instead of modern UEFI booting where it would keep the CPU in long mode after having switched to it fairly early.)
This is supported by the external link from that article. (emphasis added)
Present
Why do we have to worry about this nonsense? Because by default the A20 address line is disabled at boot time, so the operating system has to find out how to enable it, and that may be nontrivial since the details depend on the chipset used.
Since other sections of the article use the term "reset", my interpretation is that this specifically refers to it being done as a part of the boot process.
Further down the article, it specifically mentions the effect of having A20 disabled during a reset.
A20 and reset
If (in protected mode) A20 is disabled, the odd megabytes are inaccessible. After a reset, execution begins at top-of-memory: 0xfffff0 on the 286 and 0xfffffff0 on 386 and later. With disabled A20 this becomes 0xeffff0 or 0xffeffff0 and the machine will probably crash, having no memory mapped there.
@PeterCordes Means during reset A20 is enabled and bios can choose to disable it –
Albertype
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