[ARM CortexA]Difference between Strongly-ordered and Device Memory Type

Question

I am really a new starter to Cortex A and I am aware the ARM applies weakly-ordered memory model, and there are three mutually exclusive memory types:

• Strongly-ordered
• Device
• Normal

I roughly understand what Normal is for and what Strongly-ordered and Device mean. However the diffrence between strongly-ordered and device is confusing to me.

According to the Cortex-A Series Programmer's Guide, the only difference is that:

A write to Strongly-ordered memory can complete only when it reaches the peripheral or memory component accessed by the write.

A write to Device memory is permitted to complete before it reaches the peripheral or memory component accessed by the write.

I am not quite sure about what the real implification of this. I am guessing that, the order of the access to the memory typed with Strongly-ordered or Device should be coherent with programmers' codes (no out-of-order access). But the CPU will potentially execute the next instruction while accessing the memory if typed Device, and it will simply wait untill the access to be complete if typed Strongly-ordered.

Correct me if I am wrong and please tell me what is the meaning of doing this.

Thanks in advance.

Apennines

Answer 1

One important bit to understand is that memory types have no guaranted effect on the instruction stream as a whole - they affect only the ordering of memory accesses. (They may have a specific effect on a specific processor integrated in a specific way with a specific interconnect - but that can never be relied on by software.)

Another important thing to understand is that even Strongly-ordered memory provides implicit guarantees of ordering only with regards to accesses to the same peripheral. Any ordering requirements more strict than that require use of explicit barrier instructions.

A third important point is that any implicit memory access ordering that takes place due to memory types does not affect the ordering of accesses to other memory types. Again, if your application has dependencies like this, explicit barrier instructions are required.

Now, against that background - a simpler way of describing the difference between Device and Strongly-ordered memory is that Device memory accesses can be buffered - in the processor itself or in the interconnect. The difference being that a buffered access can be signalled as complete to the processor before it has completed (or even initiated) at the end point. This provides better performance at the cost of losing the synchronous reporting of any error condition.

Earwig

so @Earwig in your view what should be used for MMIO device regs say GIC ? from the explanation I think it should be strongly ordered for gic, right? please comment – Mcgriff

@mSO: Device memory is the most efficient option - since it permits the use of write buffering. Strongly-ordered would also be functionally correct, but could affect performance negatively. – Earwig

unixsmurf I have posted a question on similar lines which is here #20266229 can you please comment on it, thanks – Mcgriff

The table at the bottom of this document would suggest ordering across regions of different types is still enforced when the types are strongly ordered. I would suggest this implies accesses across suitably ordered devices are also maintained. – Wessling