The processor 8051 defines a few instructions to address a single bit to clear to 0, set to 1 or test the value followed by a conditional branch to bypass the following code if the bit was set or clear.
These instructions are very efficient, using only 2 bytes. The fist byte define the instruction and the second is the operand which identify which bit to use, out of 256 bit total.
The first 128 bits are referencing 16 SFR bytes (bits 0 to 7 at address 0x80 for P0, bit 8 to 15 for SFR at addreess 0x88 for P1, etc up to bit 120 to 127 for SFR 0xF8).
The next 128 bits, as described above by Hans Pasant, are referencing the 16 bytes of internal RAM between 0x20 and 0x2F.
The 8051 actually read the entire byte, test, set or clear the specified bit and write all 8 bit back to the same location (except for test). Beside being efficient, these instruction also do not modify any register such as R0 to R7, the accumulator, etc.
The C compiler could easily accept more than 128 "__bit" variables and replace the efficient assembler code mentioned above by the classical binary masking operations described by most people. However, the easiest solution as implemented by Keil compiler is to declare an error when using more than 128 bit variables.
There are some DSP and graphic processors which can address a specified number of bit. This can be very useful when writing efficient compression algorithm, some drawing routine, etc. For example, the TMS34010 from Texas Instruments could define two group of registers using different number of bits for each memory access. A loop could read for example 3 bit at a time using a register from the first group and write 11 bits using a register in the second group. Internally, the memory controller was still reading 16 bit, and writing back 16 bits and was modifying only the specified number of bits inside each 16 bit words. All memory operations are referencing a bit, not a word. For example, the Program Counter is incremented by 16 on execution of each instruction. The hardware would create an exception if the for lower bits would be non zero, but for performing some type of obfuscation, it would have been easy for Texas Instrument to make a chip that would accept to read the opcode with some bit shifted.
The inventors of the C language predicted that one day there could be some processor which could be bit addressable. They explained that the current restriction of reading/writing an entire word when using the bit structures (as described by Ixe013) could be lifted in the future. Unfortunately, the bit addressable processors did not gain much attention in the software world.