I've written a linux driver that ioremaps exports PCI BAR0 for a particular device to a sysfs binary attribute allowing userspace to directly control it.
The problem rears when I attempt to MMAP on top of the attribute to directly access that bit of memory (from a userland program). Reads succeed just fine and return expected values, though when I write to that memory it appears to be cached somewhere between the kernel and memory and not delivered to the GMCH root complex (and therefore the device). What I'd like to do is have an implicit write memory barrier after each access.
- Is there any way to prevent the kernel from caching writes to a mmap-ed bit of memory?
Follow ups:
- Is calling msync() after every access the "accepted" way to do this?
msync()
at all here because there is no file backing the mmap. What you might need though are some architecture specific instructions for various things ... for example to ensure correct order of hardware accesses on powerpc you may need the eieio instruction (someone has a sense of humour :-) ... same comment made here. – Spiegleman