MIPS - JAL confusion: $ra = PC+4 or PC+8?

Question

I'm having trouble understanding how the instruction jal works in the MIPS processor. My two questions are:
a) What is the value stored in R31 after "jal": PC+4 or PC+8?
b) If it's really PC+8, what happens to the instruction at PC+4? Is it executed before the jump or is it never executed?

In Patterson and Hennessy (fourth edition), pg 113:

"jump-and-link instruction: An instruction that jumps to and address and simultaneously saves the address of the following instruction in a register ($ra in MIPS)"

"program counter (PC): The register containing the address of the instruction in the program being executed"

After reading those two statements, it follows that the value saved in $ra should be (PC+4).

However, in the MIPS reference data (green card) that comes with the book, the jal instruction's algorithm is defined like this:
"Jump and Link : jal : J : R[31]=PC+8;PC=JumpAddr"

This website also states that "it's really PC+8", but strangely, after that it says that since pipelining is an advanced topic "we'll assume the return address is PC+4".
I come from 8086 assembly, so I'm aware that there's a big difference between returning to an address and to the one following it, because programs won't work if I just assume something that's not true. Thanks.

Moth

Answer 1

The address in $ra is really PC+8. The instruction immediately following the jal instruction is in the "branch delay slot". It is executed before the function is entered, so it shouldn't be re-executed when the function returns.

Other branching instructions on the Mips also have branch delay slots.

The delay slot is used to do something useful in the time it takes to execute the jal instruction.

Massive

Thanks a lot! Strangely, many websites present the wrong information (PC+4). – Moth

@ReimannCL: Websites that say PC+4 might be talking about a fake MIPS that doesn't have branch delay slots, like MARS simulates by default (with that option unchecked). They normally still encode relative branch targets the same way, but returning from a function should execute the instruction right after the jal, instead of the one after that. – Weathered

Answer 2

I got the same question. Googled this excellent answer of Richard and also another link I wish to add here.

The link is http://chortle.ccsu.edu/AssemblyTutorial/Chapter-26/ass26_4.html with this wonderful explanation of double adding 4 to the PC. So the actual execution has two additions: 1) newPC=PC+4 by pipelining and 2) another addition $ra=newPC+4 by the jal instruction resulting the effective $ra = (address of the jal instruction)+8.

Oscar