How to tell an 8086/8088 from an 80186?
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I am trying to write a program to check what processor is used to execute my program. Since this is intended to be used on a number of historic PC-clones, I want to be able to tell an 8086 from an 80186 just in case the computer is one of the rare machines that ship with an 80186. How can I do this in assembly?

Karlow answered 17/2, 2017 at 19:51 Comment(14)
Googling "detect 80186" gives me rcollins.org/ddj/Nov96/Nov96.htmlRetard
Int 6 (unknown instruction). Execute instructions that are exclusive to each processor, if it is not recognized (int 6 fires), your don't have that processor, otherwise you have it. 8086 is a special case, it gets stuck with unknown instructions, an only special case is easier to handle.Pansir
You might want to look at the file CCNEW.ASM, label $cpu_ndptst in my old program COMPTEST, distributed as CTEST260.ZIP (e.g. here). From looking at the code, a 8018x is detected as a CPU that updates the stack pointer before a PUSH (like the 8086), but masks the shift count of SHL reg, CL (unlike the 8086).Kimmel
Note that it wasn't possible to use 80186 in actual PC clones, since the integrated devices built into the 80186 used the same I/O address as different devices used in IBM PCs. There were a few computers made that had 80186 and ran MS-DOS but they're weren't 100% PC compatible.Demirep
@RossRidge That is true for the Intel 80186 (as it was targeted towards embedded systems). NEC created their V20 chip that was plugin replacement for the 8088 (was PIN compatible) but it supported the 80186 instruction set.Sarcenet
Today searching for CPUID is likely going to result in reading registers in the cpu that tell you what it is. But intel used to provide source code to a cpuid tool. For example the origial 8086/8088 had a small prefetch buffer, so if you had one instruction do self modifying code on say four instructions ahead (whatever the size of this buffer was) you could detect whether you were on an 8088/86 or not as the later processors had bigger prefetch buffers. and that self modifying operation was on data so it operated on memory not on the instruction in the prefetch buffer.Baluchistan
the code would then follow a set of similar steps to work its way through the nuances of each generation of processor up to the point where they simply started adding registers and/or instructions, whatever scheme intel uses (arm uses csrs, actually a ton of them) and whatever generation they started using that scheme.Baluchistan
I dont know if I have any of my 386/486 hard drives or backups still in a readable form that has survived. it was very interesting code to read through at the time. maybe it is stored at the internet archive. wonder how I got it maybe it was ftp sites or other as it predates the internet. but was probably still available early internet.Baluchistan
The 80186 introduced the bound instruction, I think, so maybe try to execute something like this and have an ISR ready for undefined instructions.Decontrol
@Downvoter AFAIK the 8086 simply ignores undefined instructions.Karlow
Then check if it had some effect. Use an instruction introduced by the 80186 that had some easily observable effect on the state of the processor (like modifying a register) and check if the content has changed or not. That should be straightforward to do.Decontrol
@Karlow You're right that it won't generate a #UD excption, as the neither the 8086 nor the 80186 has that exception, but the 8086 won't ignore it. I believe a BOUND instruction (opcode 62h) will be executed as a JC instruction (opcode 72h), as the entire range of opcodes from 60h to 6Fh aliases to the Jcc instructions in the range 70h to 7Fh. Similarly I believe every opcode value does something on the 8086 (eg. opcode 0Fh is POP CS).Demirep
Cross site duplicate: How did this 80286 detection code work? includes 8086 vs. 186 detection.Borowski
Essentially it boils down to some sort of "hacky" method of comparing known quirks of the architecture, i.e. trying an instruction that may or may not exist and observing the results. Of course it's done in a way that doesn't crash the CPU or damage it in any way.Rhomboid

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