How to send data to AXI-Stream in Zynq from software tool?

Question

I'm looking for a way to send some data from my software app written in C to AXI-Stream interface of Zynq. Something like

open(/dev/axistream);
send_data(data);

I'm running Linux on the Arm part and now I want to connect it to the programmable logic part.

Heartbroken

The Zynq hardware doesn't have AXI-Stream interfaces. This mean yours was added to the PL, and without more detail on your connectivity it won't be possible to help you. – Blur

Answer 1

On a zynq device communication between the Cortex-A9 processor and FPGA is done using AXI protocol. There are three types of ports which can be used to communicate between FPGA and CPU (Zynq TRM) :

1. General Purpose AXI ports: 2x Master (from CPU to FPGA) and 2x Slave port (from FPGA to CPU). these ports are connected to the central interconnect of the processing system and can be used to transfer data to/from DDR memory or on-chip memory (OCM).
2. High Performance AXI ports: 4x Slave port (from FPGA to CPU) provide high-bandwidith access to DDR or OCM
3. ACP (Accelerator Coherency Port): Slave port (from FPGA to CPU) high-troughput port connected directly to the snoop control unit (SCU). The SCU maintains cache coherency (ommits the need for cache flush/invalidates).

From your question, I would understand that in your case the CPU is the Master of the communication. You will need to use the General-Purpose axi master ports. You cannot connect an AXI4 streaming interface to the AXI interconnect. You will need to convert AXI4 Streaming to AXI. Depending on your performance needs an AXI DMA ip core (AXI DMA IP core) might be a good solution.

If you want to communicate from software point of view using "open(/dev/)" you will need a Linux device driver. If you are using the DMA core your communication will typically look like this:

1. You will configure the DMA core to fetch data from a certain memory address
2. Start the DMA core
3. the DMA core will fetch the data and feed it to the AXI4 streaming interface of your IP block
4. Your IP block will do some operation on the data and send back to memory (using DMA) or do something else (send to external interface, ...)

The register set of your DMA core will be memory mapped and accessible through you own linux device driver. For debugging purposes i would suggest using mmap to access the registers and quickly validate the operations of your hardware. Once you go for the linux kernel device driver i would suggest you reading this book: Linux Device Drivers 3the edition

Altagraciaaltaic

Answer 2

The best choice for efficient data transfer is using DMA enabled PS-PL communication. After implementing a DMA controller inside PL, such as AXI CDMA you can connect it to an AXI4-Stream IP then to your desired IP core. If your not going to set up a general framework you can access DMA-enabled part of DDR memory using mmap() system call. Here is a template to transfer data from user space to the IP core in which a loop-back is implemented. https://github.com/h-nasiri/Zynq-Linux-DMA Zynq AXI CDMA

The AXI CDMA uses processing system HP slave port to get read/write access of DDR system memory. There is also a Linux OS based application software that uses mmap() to initialize the DMA core and then do the data transfer. You can easily add an AXI4-Stream interconnect to the AXI CDMA and connect

Joyejoyful

Answer 3

If I understand correctly, you want to DMA data from the from the PS to PL using the DMA engine. In that case, you would need to write a driver in Linux which will either use the AXI DMA engine driver, or configure the DMA engine from user space.

Is that what you are looking for?

Yeargain