Where do memory mapped I/O addreses come from?

Question

I am messing around with some hobbyist OS development, and I am a little confused on memory mapped I/O addresses. I understand the whole memory mapped I/O concept, but I am trying to figure out how developers get the addresses to manipulate hardware.

Are the addresses specified by the hardware vendors, or are they some sort of standard addresses for all computers? For example, VGA memory for text printing starts at address 0xB8000. Is that standard for every x86 machine? If so, who set that standard? And if I wanted to talk with an ethernet card, for example, how would I know the addresses or ports it uses for communication?

Thanks in advance.

Billbillabong

Answer 1

I'm not 100% sure about who sets the addresses, but as far as I'm aware, hardware vendors can set their memory map however they want.

For what it's worth, Linux lets you see how memory is currently mapped on your machine by doing cat /proc/iomem:

00000000-0000ffff : reserved
00010000-0009f3ff : System RAM
0009f400-0009ffff : reserved
000a0000-000bffff : PCI Bus 0000:00
  000a0000-000bffff : Video RAM area
000c0000-000c7fff : Video ROM
000ca000-000cbfff : reserved
  000ca000-000cafff : Adapter ROM
000cc000-000cffff : PCI Bus 0000:00
000d0000-000d3fff : PCI Bus 0000:00
000d4000-000d7fff : PCI Bus 0000:00
000d8000-000dbfff : PCI Bus 0000:00
000dc000-000fffff : reserved
  000f0000-000fffff : System ROM
00100000-3fedffff : System RAM
  01000000-01536143 : Kernel code
  01536144-017c007f : Kernel data
  01875000-0194bfff : Kernel bss
3fee0000-3fefefff : ACPI Tables
....

Favorite

Would you happen to know a definitive list of ports listed online or in a book somewhere? – Billbillabong

If you download the latest linux kernel, some architecture have their devices declared in the arch/XXX/mach-XXX directories. Also, QEMU has a wealth of mappings declared manually in the hw/ directory of the repo, although I'm not certain these are in any way authoritative or realistic. For more information look into various bus protocols like PCI or SCSI to see if they have mapping discovery functionality. – Favorite

also, just so I don't throw you off by mistake, it's iomem, not ioports. my bad. – Favorite

Just to throw my two cents in... On x86 systems, many of these MMIO addresses are set by the BIOS at boot time, although some are dictated by convention (the legacy VGA address range). Using devices probably means getting the MMIO addresses from PCI config space, but you can get a fairly complete map of resources from the ACPI tables provided by the BIOS (especially from the DSDT). Sorry for making this a comment instead of an answer, but it looks like you accepted this awhile ago! – Polarize

Answer 2

You get the port with some hardware detection mechanism like PCI bus scanning, usb, and ACPI. For example, if you found a supported display card on PCI, you query its BARs(base address registers) and you got the physical address, and/or IO port base, and/or IRQ number. Same for NIC and other card.

For things that are not on any bus, eg. ps/2 controller, the detection is a lot difficult and involve parsing the ACPI tables.

Typewrite

Answer 3

In Computer Architecture, the i/o devices are either mapped to an i/o-address-space (i/o mapped i/o) or to a memory-address-space (memory mapped i/o).

I/O Mapped I/O: The processor can differentiate between memory and i/o devices. Thus i/o devices are mapped to the I/O address space which is considerably less than the memory spaces. For example, let's the i/o-address-space is 8-bit address = 2^8 = 256 addresses Here, we have the possibility of connecting 256 i/o devices to the system. The processor uses unique control signals to the i/o and memory., 4 signals

MR (memory read), MW (memory write), IOR (input-output read), IOW (input-output write)

Usage: Home computers, small offices...

Memory Mapped I/O: The processor does not differentiate between memory and i/o devices. So i/o devices are mapped with respect to the bit address of the memory with memory addresses being allotted to the devices. For example, consider a RAM with a 16-bit address = 2^16 (64K) = 65,536 i.e., there is a possibility of connecting 65,536 i/o devices. Microcontrollers are used to manage the operations of the devices with two control signals

RD (Read) and WR (Write)

Usage: Industrial Applications

Growl