Why some numbers are defined as not a number(NaN) in floating point arithmetic? (Although they can be represented by IEEE format and indeed are real numbers)
The author of the question also posted this comment:
I don't understand how numbers for which "all exponent bits are 1's and mantissa is not all zeros" is not a real number.
The reasoning behind this comment appears to be: A binary floating-point format has a sign bit s, some exponent bits e, and some significand bits f. For most values of e, the value represented is (−1)s•1.f•2e-bias (where “1.f” is the binary numeral formed by concatenating “1.“ and the bits f and bias is the encoding bias for the exponent). With this scheme, an exponent value of all ones would be a number, so how is it a NaN?
The answer is that the IEEE-754 standard specifies what the bits of a floating-point encoding represent, and it states that:
- If e is zero, the value represented is (−1)s•0.f•2emin, where emin is the minimum exponent for the format. (emin equals 1-bias.)
- If e is not all zero or all ones, the value represented is (−1)s•1.f•2e-bias.
- If e is all ones and f is zero, the value represented is (−1)s•∞.
- If e is all ones and f is not zero, the value represented is a NaN. (There are some implementation-dependent details about signaling NaNs versus quiet NaNs and use of the bits of f for conveying additional information.)
The fact there is a pattern of values represented for the values of e between (but not including) all zeros and all ones does not mean the pattern must extended to when e is all zeros or all ones. Nothing about logic or physics compels us to design hardware that extends the pattern to all values of e. The rules were made as described as above, and implementations of IEEE-754 floating-point follow those rules.
Additionally, the values described above form a set that IEEE-754 calls floating-point data. That set includes −∞ and +∞, the various non-zero real numbers arising from values of s, e, and f, two “zeros” distinguished by sign: −0 and +0, and NaN. Much of the IEEE-754 specification of arithmetic operations then uses those values. For example, addition is defined to produce a result as if the exact mathematical sum were calculated and then a rounding rule were applied to it. Each rounding rule specifies that, if the value goes out of certain bounds, the result is an infinity. Otherwise, the exact mathematical sum is rounded to the nearest representable value in a direction specified by the rounding rule (such as nearest in either direction, toward +∞, toward −∞, or toward zero).
So, when IEEE-754 is implemented, in either hardware or software, the implementation is designed to follow these rules. When the rules say that infinity is to be produced, the implementation produces the bit pattern that represents an infinity. When an input operand has the bit pattern for infinity, the implementation treats it as infinity, not as the real number it would represent if the exponent encoding had a meaning that extended the pattern of normal numbers.
The special cases of Inf and NaN are not treated as numbers because they are Inf and NaN by definition. That definition is in section 6.2.1 of IEEE 754-2008 (not a free standard).
The generation and propagation of NaNs is handled in hardware (at least on Intel hardware, see "Intel® 64 and IA-32 Architectures Software Developer’s Manual" as an example, specifically E4.2.2 which covers it in detail).
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