Entering HALT mode with master interrupt enabled but no Interrupt Enable (0xFF0F = 0)?

Question

According to Gameboy Programming Manual,

HALT mode is canceled by the following events, which have the starting addresses indicated.

1. A LOW signal to the /RESET terminal Starting address: 0x0000

2. The interrupt-enable flag and its corresponding interrupt request flag are set

   • IME = 0 (Interrupt Master Enable flag disabled) Starting address: address following that of the HALT instruction

   • IME = 1 (Interrupt Master Enable flag enabled) Starting address: each interrupt starting address

Assume a program enters HALT mode with Interrupt Master Enable flag enabled IME = 1 and Interrupt Enable disabled for any interrupt 0xFF0F = 0, what would happen? What is the expected behaviour on the actual Gameboy device?

Bloodcurdling

By the way, if you like emulation and you think that questions like this one would be more suitable for a separate stack exchange site, please take a look at two proposals on Area 51 Emulation and Retrocomputing. – Bloodcurdling

Does the current answer fit your needs? – Seaquake

@pokechu22 no, it doesn't. – Bloodcurdling

The CPU will halt forever, as the answer states, that's it. If that's not the answer then edit your question to better reflect what you actually want to know. – Division

Answer 1

I am not sure if I understand your question right, but anyway:
According to the cited manual, the IE (interrupt enable) register, address FFFF, determines which one of the 5 interrupt types are enabled. Only those set to 1 will be accepted if IME (interrupt master enable) ist set to 1. The IF (interrupt flags) register, address FF0F, provides merely information which interrupts are requested.
So, if a program is in the HALT state with IME = 1, any interrupt is accepted that is enabled in IE. Of course, somebody had to generate the interrupt(s) which would be indicated by a (or more) 1 in the IF register.

EDIT:

Maybe this answers your question now:
If the program enters HALT mode, Interrupt Master Enable is enabled (IME = 1), but all specific interrupt types are disabled (IE = 0), no interrupt will be accepted, and HALT mode is not left. This is the expected behavior on the device.

Cascade

Thank you for taking you time to answer, however this is not an answer to my question. – Bloodcurdling

Could you please tell me, why not? – Furcate

Sorry @Reinhard Männer I had not seen your edit. Thank you! – Bloodcurdling