The intel intrinsic functions have the subtype of the vector built into their names. For example, _mm_set1_ps is a ps, which is a packed single-precision aka. a float. Although the meaning of most ...

I use gdb info registers <tab> to see all the registers, but I don't see MMX registers. My CPU is Xeon Platinum 8163, a modern Xeon cpu that supports SSE and MMX. So i think its a gdb proble...

I'm currently working on updating a large codebase from VS2013 to VS2019. One of the compiler errors I've run into is as follows: intrinsics.h(348): error C3861: '_mm_cvtpd_pi32': identifier not...

When I look at diagrams and overviews of recent processors[1], I never see mention of the MMX registers MM0 - MM7. But from the specs, it seems like they still exist. Can one depend on them being p...

I've been looking at MMX/SSE and I am wondering. There are instructions for packed, saturated subtraction of unsigned bytes and words, but not doublewords. Is there a way of doing what I want, or ...

In AT&T syntax instructions often have to be suffixed with the appropriate operand size, with q for operations on 64-bit operands. However in MMX and SSE there is also movq instruction, with th...

I'm trying to revive an old Win32 game that uses 3DNow! instruction set to make 3D rendering. On modern OSs like Win7 - Win10 instructions like FPADD or FPMUL are not allowed and the program throw...

I wrote this code in NASM: PADDD mm0, mm1 And it was assembled with no errors, but this instruction, though it exists in NASM, I couldn't find it in Intel Instructions Manuals, all I found is th...

I'm currently learning assembly programming on Intel x86 processor. Could someone please explain to me, what is the difference between MMX and XMM register? I'm very confused in terms of what fun...

Is converting then shifting then bitwise-or'ing the only way to convert from two __m128d to a single __m128i? This is perfectly acceptable to Xcode in an x64 build m128d v2dHi = .... m128d v2dLo ...

Using SSE intrinsics, I've gotten a vector of four 32-bit floats clamped to the range 0-255 and rounded to nearest integer. I'd now like to write those four out as bytes. There is an intrinsic _mm...

I understand converting MMX 32bit mmx intrinsics no longer allows the __m64. So I was having great trouble upgrading this piece of code to SSE. I was told on another stack-Overflow post to post my ...

So when I started the conversion and set the target to 'x64', I get 7 unresolved externals. Two examples: error LNK2001: unresolved external symbol _m_empty ...CONVOLUTION_2D_USHORT.obj CONVOLUTIO...

I am programming the following: __asm__ volatile ("movq %%rax, %%mm1\n" "movq %%rcx, %%mm2\n" : : "a" (0xDEADBEEFDEADBEEF), "c" (0xBADFACE5BADFACE5)); In this case, I am moving the value from ...

I'm thinking I should familiarize myself with x86 SIMD extensions. But before I even began I ran into trouble. I can't find a good overview on which of them are still relevant. The x86 architectur...

What is the proper way to convert an __int64 value to an __m64 value for use with SSE?

I am trying to optimize some arithmetic by using the MMX and SSE instruction sets with inline assembly. However, I have been unable to find good references for the timings and usages of these enhan...

I am trying to optimize a small piece of code with SSE intrinsics (I am a complete beginner on the topic), but I am a little stuck on the use of conditionals. My original code is: unsigned long c...

Where can I find information about common SIMD tricks? I have an instruction set and know, how to write non-tricky SIMD code, but I know, SIMD now is much more powerful. It can hold complex conditi...

I am curious, do new compilers use some extra features built into new CPUs such as MMX SSE,3DNow! and so? I mean, in original 8086 there was even no FPU, so compiler that old cannot even use it, ...